D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 522

MCU 3V 0K I-TEMP 144-QFP

D12674RVFQ33D

Manufacturer Part Number
D12674RVFQ33D
Description
MCU 3V 0K I-TEMP 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheet

Specifications of D12674RVFQ33D

Core Processor
H8S/2600
Core Size
16-Bit
Speed
33MHz
Connectivity
IrDA, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412674RVFQ33D
HD6412674RVFQ33D

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12674RVFQ33DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 10 I/O Ports
Notes: 1. IRQ11 interrupt input when ITS11 = 0.
Notes: 1. IRQ10 interrupt input when ITS10 = 0.
Rev. 3.00 Mar 17, 2006 page 470 of 926
REJ09B0283-0300
TEE1
DMACS
P63DDR
Pin function
TEE0
DMACS
P62DDR
Pin function
P63/TMCI1/TEND1/IRQ11
The pin function is switched as shown below according to the combination of bit DMACS in
PFCR2, bit TEE1 in DMATCR of the DMAC, bit P63DDR, and bit ITS11 in ITSR.
P62/TMCI0/TEND0/IRQ10
The pin function is switched as shown below according to the combination of bit DMACS in
PFCR2, bit TEE0 in DMATCR of the DMAC, bit P62DDR, and bit ITS10 in ITSR.
2. When used as the external clock input pin for the TMR, its pin function should be
2. When used as the external clock input pin for the TMR, its pin function should be
specified to the external clock input by the CKS2 to CKS0 bits in TCR_1.
specified to the external clock input by the CKS2 to CKS0 bits in TCR_0.
input
input
P63
P62
0
0
0
0
output
output
P63
P62
1
1
IRQ11 interrupt input *
IRQ10 interrupt input *
TMCI1 input *
TMCI0 input *
input
input
P63
P62
0
0
1
1
2
2
output
output
P63
P62
1
1
1
1
1
1
TEND1
TEND0
output
output
0
0

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