D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 323

• Manufacturer Part Number: D12674RVFQ33D
• Description: MCU 3V 0K I-TEMP 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of D12674RVFQ33D

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: IrDA, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412674RVFQ33D; HD6412674RVFQ33D

Bit
Bit Name
Initial Value
R/W
Description
0000: Setting prohibited
0001: Setting prohibited
0010: Activated by DREQ pin falling edge input
0011: Activated by DREQ pin low-level input
010x: Setting prohibited
0110: Auto-request (cycle steal)
0111: Auto-request (burst)
1xxx: Setting prohibited
0000: Setting prohibited
0001: Activated by A/D converter conversion
0010: Activated by DREQ pin falling edge input
0011: Activated by DREQ pin low-level input
0100: Activated by SCI channel 0 transmission
0101: Activated by SCI channel 0 reception
0110: Activated by SCI channel 1 transmission
0111: Activated by SCI channel 1 reception
1000: Activated by TPU channel 0 compare
1001: Activated by TPU channel 1 compare
1010: Activated by TPU channel 2 compare
1011: Activated by TPU channel 3 compare
1100: Activated by TPU channel 4 compare
Normal Mode
Block Transfer Mode
(detected as a low level in the first
transfer after transfer is enabled)
end interrupt
(detected as a low level in the first
transfer after transfer is enabled)
complete interrupt
complete interrupt
complete interrupt
complete interrupt
match/input capture A interrupt
match/input capture A interrupt
match/input capture A interrupt
match/input capture A interrupt
match/input capture A interrupt
Rev. 3.00 Mar 17, 2006 page 271 of 926
Section 7 DMA Controller (DMAC)
REJ09B0283-0300