D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 419

• Manufacturer Part Number: D12674RVFQ33D
• Description: MCU 3V 0K I-TEMP 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of D12674RVFQ33D

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: IrDA, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412674RVFQ33D; HD6412674RVFQ33D

Transfer Requests from Multiple Channels in Auto Request Cycle Steal Mode: If transfer
requests for different channels are issued during a transfer in auto request cycle steal mode, the
operation depends on the channel priority. If the channel that made the transfer request is of higher
priority than the channel currently performing transfer, the channel that made the transfer request
is selected.
If the channel that made the transfer request is of lower priority than the channel currently
performing transfer, that channel’s transfer request is held pending, and the currently transferring
channel remains selected.
The selected channel begins transfer after the currently transferring channel releases the bus. If
there is a bus request from a bus mastership other than the EXDMAC at this time, a cycle for the
other bus mastership is initiated. If there is no other bus request, the bus is released for one cycle.
Figure 8.14 shows examples of transfer timing in cases that include auto request cycle steal mode.
Address bus
EXDMA control
Channel 0
Channel 1
Channel 2
Idle
Request
Request
Figure 8.13 Example of Channel Priority Timing
Request cleared
held
held
Channel 0
Selected
selected
Not
Request
Channel 0 transfer
Request cleared
held
Channel 0
Channel 1
Selected
release
Bus
Rev. 3.00 Mar 17, 2006 page 367 of 926
Channel 1 transfer
Request cleared
Channel 1
Section 8 EXDMA Controller
Channel 2
release
Bus
REJ09B0283-0300
Channel 2 transfer
Channel 2