D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 573

• Manufacturer Part Number: D12674RVFQ33D
• Description: MCU 3V 0K I-TEMP 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of D12674RVFQ33D

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: IrDA, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 103
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Other names: HD6412674RVFQ33D; HD6412674RVFQ33D

TIMTPU0A_010020020400
This LSI has an on-chip 16-bit timer pulse unit (TPU) that comprises six 16-bit timer channels.
The function list of the 16-bit timer unit and its block diagram are shown in table 11.1 and figure
11.1, respectively.
11.1
Maximum 16-pulse input/output
Selection of 8 counter input clocks for each channel
The following operations can be set for each channel:
Waveform output at compare match
Input capture function
Counter clear operation
Synchronous operations:
Buffer operation settable for channels 0 and 3
Phase counting mode settable independently for each of channels 1, 2, 4, and 5
Cascaded operation
Fast access via internal 16-bit bus
26 interrupt sources
Automatic transfer of register data
Programmable pulse generator (PPG) output trigger can be generated
A/D converter conversion start trigger can be generated
Module stop mode can be set
Multiple timer counters (TCNT) can be written to simultaneously
Simultaneous clearing by compare match and input capture possible
Register simultaneous input/output possible by counter synchronous operation
Maximum of 15-phase PWM output possible by combination with synchronous operation
Features
Section 11 16-Bit Timer Pulse Unit (TPU)
Section 11 16-Bit Timer Pulse Unit (TPU)
Rev. 3.00 Mar 17, 2006 page 521 of 926
REJ09B0283-0300