D12674RVFQ33D Renesas Electronics America, D12674RVFQ33D Datasheet - Page 802

MCU 3V 0K I-TEMP 144-QFP

D12674RVFQ33D

Manufacturer Part Number
D12674RVFQ33D
Description
MCU 3V 0K I-TEMP 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheet

Specifications of D12674RVFQ33D

Core Processor
H8S/2600
Core Size
16-Bit
Speed
33MHz
Connectivity
IrDA, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
103
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6412674RVFQ33D
HD6412674RVFQ33D

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D12674RVFQ33DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 16 A/D Converter
16.3.3
ADCR enables A/D conversion start by an external trigger input.
Bit
7
6
5, 4
3
2
1, 0
Rev. 3.00 Mar 17, 2006 page 750 of 926
REJ09B0283-0300
H8S/2678 Group
Bit Name
TRGS1
TRGS0
CKS1
CH3
A/D Control Register (ADCR)
Initial Value
0
0
All 1
1
1
All 1
R/W
R/W
R/W
R/W
R/W
Description
Timer Trigger Select 1 and 0
These bits select enabling or disabling of the start
of A/D conversion by a trigger signal.
00: A/D conversion start by external trigger is
01: A/D conversion start by external trigger (TPU)
10: A/D conversion start by external trigger (TMR)
11: A/D conversion start by external trigger pin
Reserved
These bits are always read as 1 and cannot be
modified.
Clock Select 1
Used together with the CKS bit in ADCSR to set
the A/D conversion time. See the description of the
CKS bit for details.
Channel Select 3
Used together with bits CH2 to CH0 in ADCSR to
select the analog input channel(s). See the
description of bits CH2 to CH0 for details.
Reserved
These bits are always read as 1 and cannot be
modified.
disabled
is enabled
is enabled
(ADTRG) is enabled

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