SW00ENB-ZCC Toshiba, SW00ENB-ZCC Datasheet - Page 108

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SW00ENB-ZCC

Manufacturer Part Number
SW00ENB-ZCC
Description
MCU, MPU & DSP Development Tools CASEWORKS
Manufacturer
Toshiba
Datasheet

Specifications of SW00ENB-ZCC

Tool Type
Development Software Support
Core Architecture
870
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
7.10 Port A (PA0–PA7)
pins. Upon reset, all Port A pins are configured as input port pins.
PA7 as the Serial Bus Interface (SBI) pins.
clears all the PACR and PAFC register bits, configuring all Port A pins as input port pins.
corresponding bits in the PAFC register must be set to 1.
description, see the TMP1940FDBF datasheet pages.
Eight Port A pins can be individually programmed to function as discrete general-purpose or dedicated I/O
Alternatively, PA0–PA3 can be programmed as external interrupt request pins (INT1–INT4), and PA5–
Setting the PAFC register bits configures the corresponding Port 8 pins for dedicated functions. A reset
When INT1–INT4 are used as a wake-up from STOP mode with the SYSCR2.DRVE bit cleared, the
In the TMP1940FDBF with an on-chip flash, Port A can act as an interface to the DSU ICE. For a detailed
TMP1940CYAF-66
TMP1940CYAF

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