SW00ENB-ZCC Toshiba, SW00ENB-ZCC Datasheet - Page 294

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SW00ENB-ZCC

Manufacturer Part Number
SW00ENB-ZCC
Description
MCU, MPU & DSP Development Tools CASEWORKS
Manufacturer
Toshiba
Datasheet

Specifications of SW00ENB-ZCC

Tool Type
Development Software Support
Core Architecture
870
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD16–AD23
CS0 –
AD0–AD15
Internal
WAIT
/ R
CS
CLK
ALE
RD
Note1:
Note2:
W
3
Figure 18.3 Read Cycle Timing (ALE = 1.5, 2 Externally Generated Wait States with N=1)
If t
The internal CLK is not the system clock driven out from the SCOUT pin.
AWH
and/or t
A0–A15
S1
t
AWL/H
AWL
cannot be satisified, a bus cycle must be initiated with the WAIT pin asserted.
W
t
TMP1940CYAF-252
CW
Bus Cycle = 6 CLK Cycles
W
S2
TMP1940CYAF
D0–D15
S3
S0

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