SW00ENB-ZCC Toshiba, SW00ENB-ZCC Datasheet - Page 212

• Manufacturer Part Number: SW00ENB-ZCC
• Description: MCU, MPU & DSP Development Tools CASEWORKS
• Manufacturer: Toshiba

Specifications of SW00ENB-ZCC

• Tool Type: Development Software Support
• Core Architecture: 870
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.2.2
Baud Rate Generator
(1) Baud Rate Generator Configuration
(2) Baud Rate Calculations
generator. The clock source for the baud rate generator can be selected from the 6-bit prescalar
outputs ( T0, T2, T8, T32) through the programming of the BR0CK[1:0] field in the BR0CR.
16), or 16 (where n is an integer between 2 and 15, and m is an integer between 0 and 15). The
clock divisor is programmed into the BR0ADDE and BR0S[3:0] bits in the BR0CR and the
BR0K[3:0] bits in the BR0ADD.
The frequency used to transimit and receive data through the SIO0 is derived from the baud rate
The baud rate generator contains a clock divider that can divide the selected clock by 1, n + (m /
a. When BR0CR.BR0ADDE = 0
b. When BR0CR.BR0ADDE = 1
UART Mode
meaning or effect. In this case, the baud rate generator input clock is divided down by a value
of N (1 to 16) programmed in the BR0CR.BR0S[3:0] field.
The baud rate generator input clock is divided down according to the value of N (2 to 15)
programmed in the BR0CR.BR0S[3:0] field and the value of K (1 to 15) programmed in the
BR0ADD.BR0K[3:0] field.
I/O Interface Mode
BR0CR.BR0ADDE must be cleared, so the baud rate generator input clock is divided down
by a value of N (1 to 16) programmed in the BR0CR.BR0S[3:0] field.
UART Mode
500 kbps (with no clock division by the baud rate generator).
clock. In this case, the maximum baud rate is 1 Mbps @fsys = 32 MHz.
I/O Interface Mode
2 Mbps (with the clock divided by 2 by the baud rate generator).
Note:
When the BR0CR.BR0ADDE bit is cleared, the BR0ADD.BR0K[3:0] field has no
Setting the BR0CR.BR0ADDE bit enables the N + (16 – K) / 16 clock division function.
I/O Interface mode can not utilize the N + (16 – K) / 16 clock division function. The
Baud Rate
When the clock input to the baud rate generator is 8-MHz T0, the maximum baud rate is
The baud rate generator can by bypassed if the user wants to use the fsys/2 clock as a serial
Baud Rate
When the clock input to the baud rate generator is 8-MHz T0, the maximum baud rate is
Setting N to 0 or 16 disables the N + (16 – K) / 16 clock division function. When N = 0 or
16, the BR0CR.BR0ADDE bit must be cleared.
baud
baud
baud
baud
rate
rate
TMP1940CYAF-170
rate
rate
generator
generator
generator
generator
input
input
divisor
divisor
clock
clock
2
16
TMP1940CYAF