SW00ENB-ZCC Toshiba, SW00ENB-ZCC Datasheet - Page 55

• Manufacturer Part Number: SW00ENB-ZCC
• Description: MCU, MPU & DSP Development Tools CASEWORKS
• Manufacturer: Toshiba

Specifications of SW00ENB-ZCC

• Tool Type: Development Software Support
• Core Architecture: 870
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Note 1:
Note 2:
Note 3:
XT1
XT2
5.1.3
X1
X2
fperiph
SYSCR0.
SYSCR0.
Oscillator
When the clock gear is used to reduce the system clock frequency (fsys), the prescalars within on-chip
peripherals must be programmed so that the prescaler output ( Tn) satisfies the following relationship:
Descriptions of each peripheral on the following sections include tables showing legal programming alternatives.
When the low-speed clock (fs) is used as the system clock, all on-chip peripherals except the Watchdog Timer
(WDT) and the Real-Time Counter (RTC) must be disabled.
The presclar clock source ( Tn) must not be changed while any of the peripherals to which it is supplied are
running.
Oscillator
fs
fsys
Speed
XTEN
Speed
XEN
High-
Low-
Clock Source Block Diagrams
Tn < fsys / 2
fosc
fs
SYSCR0.WUEF
SYSCR2.WUPT[1:0]
SYSCR3.LUPTM
SYSCR1.DFOSC
PLL
2
2
Lock (PLL) Timer
Warm-up Timer
fpll
Figure 5.3 Clock Source Block Diagrams
4
fosch
PRCK[1:0]
SYSCR0.
MUX
4
TMP1940CYAF-13
SYSCR3.SCOSEL
PLLOFF (Default setting pin)
fc
Real-Time Counter
2
(RTC)
4
8
DMAC
INTC
ROM
RAM
CPU
2
T0
SYSCR1.GEAR[1:0]
The default is 1/8 on reset.
fgear
SYSCR1.SYSCK
SYSCR1.FPSEL
SBI, PIO, WDT, RTC
On-chip peripherals:
ADC, TMRA/B, SIO,
On-chip peripherals:
SCOUT
2
TMRA/B, SIO, SBI
TMP1940CYAF
(prescaler input)
4
ADCCK[1:0]
fperiph
(To on-chip
peripherals)
fs
fsys
fadc