SW00ENB-ZCC Toshiba, SW00ENB-ZCC Datasheet - Page 433

• Manufacturer Part Number: SW00ENB-ZCC
• Description: MCU, MPU & DSP Development Tools CASEWORKS
• Manufacturer: Toshiba

Specifications of SW00ENB-ZCC

• Tool Type: Development Software Support
• Core Architecture: 870
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.7.6
3.7.7
3.7.8
3.7.9
Read Mode and Embedded Operation Mode
Read mode. In Embedded Operation mode, array data can not be read. In Programmer mode, all bus
cycles such as the writing of commands and the reading of data are performed as a 16-bit halfword
quantity.
disabled in Programmer mode by programming this bit. In Programmer mode, the FSE pin is used for
this purpose. For a detailed description, see Section 3.7.17. In Normal operation mode, the FSE pin
must be held at the V
stable.
Reading Array Data
and after an embedded operation is successfully completed.
Writing commands
internal command register. This uses the same mechanism as for JEDEC-standard EEPROMs.
Commands are made up of data sequences written at specific addresses via the command register. See
Table 3.25 on page 81 for the list of command sequences.
sequence cycles. The Read/Reset command clears the command register and resets the flash memory to
Read mode. Invalid command sequences also cause the flash memory to clear the command register and
returns to Read mode.
Reset
The flash memory of the TMP1940FDBF has the following two modes of operation:
The flash memory enters Embedded Operation mode when a valid command sequence is executed in
The flash memory has a security bit apart from the flash array. The reading of the flash array can be
The flash memory is automatically set to reading array data upon CPU reset after device power-up
The operations of the flash memory are selected by commands or command sequences written into the
The command sequence being written can be canceled by issuing the Read/Reset command between
Read mode in which array data is read
Embedded Operation mode in which the flash memory is programmed or erased
Read/Reset command (software reset)
The flash memory does not return to Read mode if an embedded operation terminated
abnormally. In this case, the Read/Reset command must be issued to put the flash memory back
in Read mode. The Read/Reset command may also be written between sequence cycles of the
command being written to clear the command register.
Hardware reset
The
the internal command register being written. A reset is performed when the
V
Read mode. An embedded operation that was interrupted should be re-initiated once the flash
memory is ready to accept another command sequence because data may be corrupted.
IL
and kept low at least 500 ns. It takes 20 m for a reset to complete and put flash memory in
RESET
IL
pin provides a hardware method of terminating an embedded operation or clearing
level to access the flash array. During any operation, the FSE pin must remain
TMP1940FDBF-75
TMP1940FDBF
RESET
pin is set to