EP4SE530H35C2N Altera, EP4SE530H35C2N Datasheet - Page 1047
EP4SE530H35C2N
Manufacturer Part Number
EP4SE530H35C2N
Description
IC STRATIX IV FPGA 530K 1152HBGA
Manufacturer
Altera
Series
STRATIX® IV Er
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(72 pages)
6.EP4SE230F29C3N.pdf
(12 pages)
Specifications of EP4SE530H35C2N
Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
744
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-HBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP4SE530H35C2N
Manufacturer:
ALTERA
Quantity:
147
- EP4SGX110DF29C3N PDF datasheet
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Chapter 2: Transceiver Design Flow Guide for Stratix IV Devices
Example 1: Fibre Channel Protocol Application
Figure 2–12. FC4G Instance Settings (Word Aligner Screen)
February 2011 Altera Corporation
■
Word Aligner screen—The fibre channel protocol requires that you use K28.5 to
align the byte boundary. In the What is the word alignment pattern? option, set
one of the 10-bit disparity values to K28.5. The word aligner automatically detects
when the other disparity value is received.
■
■
Select the rx_patterndetect and rx_syncstatus signals. The
rx_patterndetect signal indicates whenever the word alignment pattern is
detected in the word boundary.
Click Finish to exit the ALTGX MegaWizard Plug-In Manager.
Stratix IV Device Handbook Volume 3
2–29
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