EP4SE530H35C2N Altera, EP4SE530H35C2N Datasheet - Page 1149
EP4SE530H35C2N
Manufacturer Part Number
EP4SE530H35C2N
Description
IC STRATIX IV FPGA 530K 1152HBGA
Manufacturer
Altera
Series
STRATIX® IV Er
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(72 pages)
6.EP4SE230F29C3N.pdf
(12 pages)
Specifications of EP4SE530H35C2N
Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
744
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-HBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP4SE530H35C2N
Manufacturer:
ALTERA
Quantity:
147
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Chapter 1: DC and Switching Characteristics for Stratix IV Devices
Document Revision History
Table 1–54. Document Revision History (Part 2 of 3)
April 2011 Altera Corporation
November 2010
September 2010
July 2010
March 2010
February 2010
November 2009
June 2009
Date
Version
4.5
4.0
4.4
4.3
4.2
4.1
3.1
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Updated Table 1–29.
Updated chapter title.
Minor text edits.
Applied new template.
Updated Table 1–1 and Table 1–5.
Updated Table 1–7, Table 1–22, Table 1–23, Table 1–33, Table 1–35, Table 1–36, and
Table 1–40.
Added Table 1–39.
Changed “PCI Express” to “PCIe” throughout.
Minor text edits
Updated Table 1–22, Table 1–23, Table 1–30, Table 1–46, and Table 1–49.
Added Table 1–31.
Minor text edits.
Updated Table 1–11, Table 1–22, Table 1–23, Table 1–24, Table 1–25, Table 1–26,
Table 1–27, Table 1–29, Table 1–32, Table 1–33, Table 1–34, Table 1–35, Table 1–39,
Table 1–40, Table 1–43, Table 1–46, and Table 1–49.
Added Stratix IV GT speed grade note to Table 1–32, Table 1–35, Table 1–39, Table 1–43,
Table 1–44, Table 1–45, and Table 1–46.
Added Table 1–28 and Table 1–30.
Minor text edits.
Added Table 1–9, Table 1–15, Table 1–38, and Table 1–39.
Added Figure 1–5 and Figure 1–6.
Added the “Transceiver Datapath PCS Latency” section.
Updated the “Electrical Characteristics”, “Operating Conditions”, and “I/O Timing”
sections.
All tables updated except Table 1–16, Table 1–24, Table 1–25, Table 1–26, Table 1–27,
Table 1–33, Table 1–34, and Table 1–45.
Updated Figure 1–2 and Figure 1–3.
Updated Equation 1–1.
Deleted Table 1-28, Table 1-29, Table 1-30, Table 1-42, Table 1-43, and Table 1-44.
Minor text edits.
Added “Preliminary Specifications” to the footer of each page.
Updated Table 1–1, Table 1–2, Table 1–7, Table 1–10, Table 1–11, Table 1–12,
Table 1–21, Table 1–22, Table 1–23, Table 1–25, Table 1–37, Table 1–38, Table 1–39,
Table 1–40, and Table 1–44.
Minor text edits.
Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum
Changes
1–67
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