EP4SE530H35C2N Altera, EP4SE530H35C2N Datasheet - Page 772
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EP4SE530H35C2N
Manufacturer Part Number
EP4SE530H35C2N
Description
IC STRATIX IV FPGA 530K 1152HBGA
Manufacturer
Altera
Series
STRATIX® IV Er
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(72 pages)
6.EP4SE230F29C3N.pdf
(12 pages)
Specifications of EP4SE530H35C2N
Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
744
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-HBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP4SE530H35C2N
Manufacturer:
ALTERA
Quantity:
147
- EP4SGX110DF29C3N PDF datasheet
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- EP4SGX110DF29C3N PDF datasheet #5
- EP4SE230F29C3N PDF datasheet #6
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3–18
Figure 3–7. Examples of Supported and Unsupported Configurations to Combine Instances in Basic ×4 Mode
Stratix IV Device Handbook Volume 2: Transceivers
Basic mode and ×4 sub-protocol
Receiver and Transmitter
(any functional mode)
Transceiver Block
2 Regular Channels
2 Regular Channels
Receiver only
Configuration
Instance 1
Supported
Instance 0
The CMU0 PLL or CMU1 PLL can drive the central clock divider block in the CMU0
channel. In cases where you use CMU1 PLL for bonded ×4 mode, the Quartus II
software does not allow you to use CMU0 PLL for any other configuration because part
of the CMU0 channel (the central clock divider) is already used by the bonded ×4
functional mode.
Using the remaining channels in Basic (PMA Direct) ×1 or ×N mode depends on the
following conditions.
1. If CMU1 PLL is available for clock generation, you can use the remaining transmitter
2. If you want to configure the remaining transmitter channels at the same data rate
3. If all the regular channels are configured in bonded ×4 functional mode, you can
Figure 3–7
channels in the transceiver block in Basic (PMA Direct) ×1 configuration.
as the bonded ×4 functional mode, you can configure the remaining transmitter
channels in Basic (PMA Direct) ×1 mode. The requirements are specified in
“Sharing CMU PLLs” on page 3–5
Channels” on page
configure the transmitter side of the CMU0 channel in Basic (PMA Direct) ×N mode
in single-width configuration only (double-width configuration is not supported).
You can use the CMU1 channel in Basic (PMA Direct) ×N single-width or
double-width configuration.
1
This only applies to the transmitter side and not the receiver side of the
CMU channel.
shows examples of supported and unsupported combinations.
Basic mode and ×4 sub-protocol
3–3.
Receiver and Transmitter
Transmitter and Receiver
(Basic [PMA Direct] xN
Transceiver Block
3 Regular Channels
Chapter 3: Configuring Multiple Protocols and Data Rates in Stratix IV Devices
Functional mode)
Configuration
1 CMU Channel
Supported
Instance 0
Instance 1
and
Combining Channels Configured in Protocol Functional Modes
“General Requirements to Combine
Basic mode and ×4 sub-protocol
Receiver and Transmitter
Basic [PMA Direct] mode)
Transceiver Block
2 Regular Channels
(any mode other than
February 2011 Altera Corporation
2 Regular Channels
Transmitter only
Configuration
Unsupported
Instance 0
Instance 1
Red: Unsupported
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