EP4SE530H35C2N Altera, EP4SE530H35C2N Datasheet - Page 655

• Manufacturer Part Number: EP4SE530H35C2N
• Description: IC STRATIX IV FPGA 530K 1152HBGA
• Manufacturer: Altera
• Series: STRATIX® IV Er

Specifications of EP4SE530H35C2N

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 744
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-HBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

Chapter 1: Transceiver Architecture in Stratix IV Devices
Transceiver Port Lists
Table 1–73. Stratix IV GX and GT ALTGX Megafunction Ports: Transmitter Ports (Part 3 of 3)
February 2011 Altera Corporation
tx_invpolarity
Transmitter Physical Media Attachment
tx_dataout
fixedclk
Port Name
Output
Output
Input/
Input
Input
pulse width is two
signal. Minimum
Asynchronous
Clock Domain
parallel clock
Clock signal
cycles.
N/A
Transmitter polarity inversion control. This
feature is useful for correcting situations in
which the positive and negative signals of the
differential serial link are accidentally swapped
during board layout.
■
■
Transmitter serial data output port.
125-MHz clock for receiver detect and offset
cancellation in PCIe mode.
When asserted high in single-width
modes—the polarity of every bit of the 8-bit
or 10-bit input data to the serializer gets
inverted.
When asserted high in double-width
modes—the polarity of every bit of the
16-bit or 20-bit input data to the serializer
gets inverted.
Stratix IV Device Handbook Volume 2: Transceivers
Description
Channel
Channel
Channel
Scope
1–211