EP4SE530H35C2N Altera, EP4SE530H35C2N Datasheet - Page 355
EP4SE530H35C2N
Manufacturer Part Number
EP4SE530H35C2N
Description
IC STRATIX IV FPGA 530K 1152HBGA
Manufacturer
Altera
Series
STRATIX® IV Er
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(72 pages)
6.EP4SE230F29C3N.pdf
(12 pages)
Specifications of EP4SE530H35C2N
Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
744
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-HBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Chapter 10: Configuration, Design Security, and Remote System Upgrades in Stratix IV Devices
Fast Active Serial Configuration (Serial Configuration Devices)
April 2011 Altera Corporation
1
While you can cascade Stratix IV devices, you cannot cascade or chain together serial
configuration devices.
If the configuration bitstream size exceeds the capacity of a serial configuration
device, you must select a larger configuration device and/or enable the compression
feature. When configuring multiple devices, the size of the bitstream is the sum of the
individual device configuration bitstreams.
A system may have multiple devices that contain the same configuration data. In
active serial chains, you can implement this by storing one copy of the .sof in the
serial configuration device. The same copy of the .sof configures the master Stratix IV
device and all remaining slave devices concurrently. All Stratix IV devices must be the
same density and package.
To configure four identical Stratix IV devices with the same .sof, set up the chain as
shown in
set to select AS configuration. The other three slave devices are set up for concurrent
configuration and their MSEL pins must be set to select PS configuration. The nCE input
pins from the master and slave are connected to GND, and the DATA and DCLK pins
connect in parallel to all four devices. During the configuration cycle, the master
device reads its configuration data from the serial configuration device and transmits
the configuration data to all three slave devices, configuring all of them
simultaneously.
Figure
10–8. The first device is the master device and its MSEL pins must be
Stratix IV Device Handbook Volume 1
10–21
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