EP4SE530H35C2N Altera, EP4SE530H35C2N Datasheet - Page 696

• Manufacturer Part Number: EP4SE530H35C2N
• Description: IC STRATIX IV FPGA 530K 1152HBGA
• Manufacturer: Altera
• Series: STRATIX® IV Er

Specifications of EP4SE530H35C2N

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 744
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-HBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -

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Stratix IV Device Handbook Volume 2: Transceivers
The transmitter channel datapath clocking in modes other than Basic (PMA Direct)
mode depends on whether the transmitter channel is configured in non-bonded or
bonded mode.
Non-Bonded Channel Configurations
The following modes other than Basic (PMA Direct) functional mode have a
non-bonded transmitter channel configuration:
■
■
■
■
■
■
■
■
Use the CMU channels to generate transceiver clocks for all the non-bonded
functional modes listed above. Additionally, you may use the ATX PLLs if the
configured data rate falls within the ATX PLL data rate range specified in the
Switching Characteristics for Stratix IV Devices
PCIe ×1—Gen1 and Gen2
Gigabit Ethernet (GIGE)
Serial RapidIO
SONET/SDH
SDI
(OIF) CEI PHY Interface
Basic (except Basic ×4 and Basic ×8 modes)
Deterministic Latency
chapter.
Chapter 2: Transceiver Clocking in Stratix IV Devices
Transceiver Channel Datapath Clocking
February 2011 Altera Corporation
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