PNX1702EH/G,557 NXP Semiconductors, PNX1702EH/G,557 Datasheet - Page 142

• Manufacturer Part Number: PNX1702EH/G,557
• Description: IC MEDIA PROC 500MHZ 456-BGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1702EH/G,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Ram Size: 208K x 8
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 61
• Voltage - Supply: 1.33 V ~ 1.47 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 456-HBGA
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 935281647557; PNX1702EH/G; PNX1702EH/G

1. Introduction
2. Functional Description
The Reset module initiates life for the PNX17xx Series system since it generates all
reset signals required for a correct initialization of the entire system (may include
board devices).
These resets signals are triggered by hardware (one type) or by software (three
types):
RST_CAUSE MMIO register holds the cause of the previous reset which allows the
software to know what happened before.
The Reset module generates three different reset signals to fully initialize a PNX17xx
Series system:
Remark: The JTAG state machine can also be reset through the JTAG pins.
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Chapter 4: Reset
PNX17xx Series Data Book – Volume 1 of 1
Rev. 1 — 17 March 2006
It sends reset signals to all DCS bus modules and the TM5250 CPU.
It sends a reset signal on the SYS_RST_OUT_N pin that can be used by external
board devices. This signal is then de-asserted by software.
Hardware external reset input to the PNX17xx Series through the pins,
POR_IN_N or RESET_IN_N.
Software assert and release of the SYS_RST_OUT_N reset pin through a write
to an MMIO register write.
Software programmable watchdog timer which asserts the same reset signals as
the hardware reset induced by the assertion of RESET_IN_N pin when a time-out
is reached.
Software PNX17xx Series system reset which asserts the same reset signals as
the hardware reset induced by the assertion of RESET_IN_N pin.
jtag_rst_n. This signal is used internally to reset the JTAG state machine. The
signal is only asserted if the POR_IN_N pin is asserted. Therefore the only mean
to reset the JTAG state machine of PNX17xx Series is by asserting the
POR_IN_N
pin.Figure 1
Preliminary data sheet