PNX1702EH/G,557 NXP Semiconductors, PNX1702EH/G,557 Datasheet - Page 645
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PNX1702EH/G,557
Manufacturer Part Number
PNX1702EH/G,557
Description
IC MEDIA PROC 500MHZ 456-BGA
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1702EHG557.pdf
(832 pages)
Specifications of PNX1702EH/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Ram Size
208K x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.33 V ~ 1.47 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-HBGA
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Lead Free Status / Rohs Status
Compliant
Other names
935281647557
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
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Volume 1 of 1
Table 24: Destination Address, XY2 Coordinates
Table 25: Vector Constant
PNX17XX_SER_1
Preliminary data sheet
Bit
Offset 0x04 F438
31:27
26:24
23:16
15:11
10:8
7:0
Bit
Offset 0x04 F43C
31:24
23:16
15:8
7:0
Symbol
Reserved
Y[10:8]
Y[7:0]
Reserved
X[10:8]
X[7:0]
Symbol
Const1 [15:8]
Const1 [7:0]
Const0 [15:8]
Const0 [7:0]
Destination Address, XY2 Coordinates
Vector Constant
W[11:0] specifies the width of a BLT in pixels. The minimum allowed value is 1 and
the maximum value is 4k-1. Zero is not a valid value for this field. W[11:0]
corresponds to bits 11:0 of this register. H[11:0] specifies the height of a BLT in lines.
The minimum allowed value is 1 and the maximum value is 4k-1. Zero is not a valid
value for this field. H[11:0] corresponds to bits 27:16 of this register.
Note that loading the high byte of this register starts a BLT or Alpha Blending
operation. This register is unchanged by any drawing operations.
This register is used to load the starting XY pixel destination coordinate for a drawing
operation.
The X and Y fields are unsigned 11-bit numbers allowing a 2K by 2K address space.
Since the drawing engine uses linear addresses internally, the X and Y coordinates in
this register will be converted to a linear address. It is byte accessible; a write to the
high byte of this register begins the conversion process from XY to linear.
This register causes the same behavior as writing to DstXY, which is provided to
allow for command register bursting during BitBlt commands.
Drawing commands that require the use of patterns must use this register to specify
the destination coordinate. Using the DstLinear register to specify the destination
during a pattern command will cause errant results. Also loads the DstLinear register
with the converted XY address.
This register holds the two error term values for the Bresenham line algorithm. These
values are computed by the host processor as follows:
Const0 = 2 x dmin - 2 x dmax
Acces
s
R/W
R/W
R/W
R/W
Acces
s
R/W
R/W
R/W
R/W
Value
0
0
0
0
Value
0
0
0
0
Rev. 1 — 17 March 2006
Description
Unsigned 11-bit Y destination address
Unsigned 11-bit X destination address
Description
Const1 = 2 x dmin
Const0 = 2 x dmin - 2 x dmax
Chapter 20: 2D Drawing Engine
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
20-25
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