PNX1702EH/G,557 NXP Semiconductors, PNX1702EH/G,557 Datasheet - Page 312
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PNX1702EH/G,557
Manufacturer Part Number
PNX1702EH/G,557
Description
IC MEDIA PROC 500MHZ 456-BGA
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1702EHG557.pdf
(832 pages)
Specifications of PNX1702EH/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Ram Size
208K x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.33 V ~ 1.47 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-HBGA
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Lead Free Status / Rohs Status
Compliant
Other names
935281647557
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
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Volume 1 of 1
Table 18: GPIO Module Status Register for all 12 Timestamp Units
PNX17XX_SER_1
Preliminary data sheet
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Offset 0x10,4FEC
31:24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
Bit
Symbol
INT_OE_9_CLR
INT_OE_8_CLR
INT_OE_7_CLR
INT_OE_6_CLR
INT_OE_5_CLR
INT_OE_4_CLR
INT_OE_3_CLR
INT_OE_2_CLR
INT_OE_1_CLR
INT_OE_0_CLR
DATA_VALID_11_CLR
DATA_VALID_10_CLR
DATA_VALID_9_CLR
DATA_VALID_8_CLR
DATA_VALID_7_CLR
DATA_VALID_6_CLR
DATA_VALID_5_CLR
DATA_VALID_4_CLR
DATA_VALID_3_CLR
DATA_VALID_2_CLR
DATA_VALID_1_CLR
DATA_VALID_0_CLR
Unused
INT_OE_11_SET
INT_OE_10_SET
INT_OE_9_SET
INT_OE_8_SET
INT_OE_7_SET
INT_OE_6_SET
INT_OE_5_SET
INT_OE_4_SET
INT_OE_3_SET
INT_OE_2_SET
INT_OE_1_SET
INT_OE_0_SET
DATA_VALID_11_SET
DATA_VALID_10_SET
INT_SET4
Acces
s
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Rev. 1 — 17 March 2006
Description
Active high clear for internal overrun interrupt for TSU 9.
Active high clear for internal overrun interrupt for TSU 8.
Active high clear for internal overrun interrupt for TSU 7.
Active high clear for internal overrun interrupt for TSU 6.
Active high clear for internal overrun interrupt for TSU 5.
Active high clear for internal overrun interrupt for TSU 4.
Active high clear for internal overrun interrupt for TSU 3.
Active high clear for internal overrun interrupt for TSU 2.
Active high clear for internal overrun interrupt for TSU 1.
Active high clear for internal overrun interrupt for TSU 0.
Active high clear for data valid interrupt for TSU 11.
Active high clear for data valid interrupt for TSU 10.
Active high clear for data valid interrupt for TSU 9.
Active high clear for data valid interrupt for TSU 8.
Active high clear for data valid interrupt for TSU 7.
Active high clear for data valid interrupt for TSU 6.
Active high clear for data valid interrupt for TSU 5.
Active high clear for data valid interrupt for TSU 4.
Active high clear for data valid interrupt for TSU 3.
Active high clear for data valid interrupt for TSU 2.
Active high clear for data valid interrupt for TSU 1.
Active high clear for data valid interrupt for TSU 0.
Active high set for internal overrun interrupt for TSU 11.
Active high set for internal overrun interrupt for TSU 10.
Active high set for internal overrun interrupt for TSU 9.
Active high set for internal overrun interrupt for TSU 8.
Active high set for internal overrun interrupt for TSU 7.
Active high set for internal overrun interrupt for TSU 6.
Active high set for internal overrun interrupt for TSU 5.
Active high set for internal overrun interrupt for TSU 4.
Active high set for internal overrun interrupt for TSU 3.
Active high set for internal overrun interrupt for TSU 2.
Active high set for internal overrun interrupt for TSU 1.
Active high set for internal overrun interrupt for TSU 0.
Active high set for data valid interrupt for TSU 11.
Active high set for data valid interrupt for TSU 10.
Chapter 8: General Purpose Input Output Pins
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
8-41
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