PNX1702EH/G,557 NXP Semiconductors, PNX1702EH/G,557 Datasheet - Page 653
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PNX1702EH/G,557
Manufacturer Part Number
PNX1702EH/G,557
Description
IC MEDIA PROC 500MHZ 456-BGA
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1702EHG557.pdf
(832 pages)
Specifications of PNX1702EH/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Ram Size
208K x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.33 V ~ 1.47 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-HBGA
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Lead Free Status / Rohs Status
Compliant
Other names
935281647557
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
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1. Introduction
1.1 Features
The MPEG-2 Variable Length Decoder (VLD) consists of two Write DMA channels
that write back data to main memory; one for Run Length (RL) data and one for
Macro Block Header (MBH) data.
The VLD decodes the Huffman encoded MPEG-1 and MPEG-2 (main profile and
main level) video elementary bitstreams. The VLD unit, enabled by the CPU, operates
independently during the slice-level decoding. The remaining bitstream decoding is
carried out by the TriMedia (TM5250) CPUs and appropriate software. The VLD also
assists the CPU and outputs a stream of macroblock headers and a stream of run-
level pairs. Run-level pair expansion, produced by the VLD into actual quantized DCT
values and their subsequent rearrangement into a natural order, is carried out by the
TM5250.
The TM5250 CPUs are also responsible for restoring or “dequantizing” the quantized
DCT values by multiplying them by the corresponding values in the 8x8 DCT
quantization matrix. The TM5250 optionally performs the frequency domain filtering
in association with the half-resolution mode, and perform the inverse discrete cosine
transformation on each of the 8x8 dequantized blocks.
The TM5250 CPU reconstructs the final video samples from the macroblock header
data decoded by the VLD, the reference frame data stored in main memory, and the
differential data previously computed.
After initialization, the TM5250 CPU controls the VLD through its command register.
There are currently nine commands supported by the VLD:
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Chapter 21: MPEG-1 and MPEG-2
Variable Length Decoder
PNX17xx Series Data Book – Volume 1 of 1
Rev. 1 — 17 March 2006
Shift the bitstream by some number of bits.
Parse a given number of macroblocks, one row, or parse continuously without
stopping at the slice header.
Search for the next start code.
Reset the Variable Length Decoder.
Initialize the VLD.
Search for the given start code.
Preliminary data sheet
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