PNX1702EH/G,557 NXP Semiconductors, PNX1702EH/G,557 Datasheet - Page 99

• Manufacturer Part Number: PNX1702EH/G,557
• Description: IC MEDIA PROC 500MHZ 456-BGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1702EH/G,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Ram Size: 208K x 8
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 61
• Voltage - Supply: 1.33 V ~ 1.47 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 456-HBGA
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 935281647557; PNX1702EH/G; PNX1702EH/G

Philips Semiconductors
Volume 1 of 1
9. General Purpose Interfaces
Table 6: Video/Data Input Operating Modes
PNX17XX_SER_1
Preliminary data sheet
mode
VDI_MODE[1:0] = 0x0 (Default
after reset)
9.1 Video/Data Input Router
VIP and QVCP share a set of pins with two general purpose interface modules, FGPI
and FGPO (respectively). The input and output data routers allocate a different
amount of pins between these four modules. The allocation depends on the operating
mode of each module. The following sections describe the different modes of the
input and output routers.
These inputs can provide combinations of the following functions:
The VDI pins consist of 38 pins, split into 32 data pins, 2 clock pins and 2 valid signals
that indicate whether data is valid on the respective clocks.
The operating modes of the video/data input router are set by the VDI_MODE MMIO
register. A subset of the operating modes are presented in
656 digital video source with streaming data inputs. A complete behavior of the
output router is available in
features, while
•
•
•
•
•
VIP function
8- or 10-bit ITU 656 with additional H&V
synchronization signals
or
8- or 10-bit raw data
decoded audio can be used for mixing with other audio for output along one of
the audio outputs. The sample rate is determined by the S/PDIF source, and
cannot be software controlled.
capture of video streams into DRAM, while performing horizontal scaling and
conversion to one of the standard pixel formats, simultaneously with data stream
capture
low-latency reception of messages from another PNX17xx Series
capture of unstructured, infinite parallel data streams into DRAM
capture of 1 or 2-dimensional parallel data streams in DRAM
for message passing and data modes, operating speeds of up to 108 MHz, with
8-, 16- or 32-bit parallel data are supported, providing an aggregate input
bandwidth of up to 432 MB/s
Section 9.3
Rev. 1 — 17 March 2006
presents some of the FGPI capabilities.
Section 7. on page
3-16.
FGPI function
up to 22-bit data capture.
FGPI is usually set in 16- or 32-bit mode
storing into main memory respectively
16- or 32-bit words
Section 7.2
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
Table
Chapter 2: Overview
summarizes the VIP
6, which combines
2-18