PNX1702EH/G,557 NXP Semiconductors, PNX1702EH/G,557 Datasheet - Page 351

• Manufacturer Part Number: PNX1702EH/G,557
• Description: IC MEDIA PROC 500MHZ 456-BGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1702EH/G,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Ram Size: 208K x 8
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 61
• Voltage - Supply: 1.33 V ~ 1.47 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 456-HBGA
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 935281647557; PNX1702EH/G; PNX1702EH/G

Philips Semiconductors
Volume 1 of 1
PNX17XX_SER_1
Preliminary data sheet
Figure 1:
Figure 2:
Q
V
C
P
i/f
CBLANK_IN
VSYNC_IN
HSYNC_IN
DATA_IN
TFTVDDON
TFTBKLTON
Signals
Block diagram of the LCD Controller
Generic Power Sequence for TFT LCD Panels
VSYNC_TFT
2.2 Power Sequencing
DE as required by the LCD panel. Apart from these timing signals, it also generates
the power enable (TFTVDDON) and back light control (TFTBKLTON) signals that are
required for some LCD’s.
LCDs are very sensitive to the power sequencing. Not following these rules may
create a latch-up or DC effect that would damage the LCD panel.
the generic power sequence constraints.
At power up of the system, the LCD panel remains without any power supply applied.
The LCD controller provides a signal, TFTVDDON, to power the LCD panel. There is
some constraint on the ramping up of the power supply (time constraint t1). But this
time constraint is board related and hence the LCD controller does not provide any
support. Once the power is stable, the data/control signals (Data/HSync/VSync/
DataEnable) may be driven after t2 (before the TFT power supply is on, the data/
control signals must be at 0 V). After the data/control signals have become valid, a
minimum time, t3, is required before the BackLight of the panel can be turned on.
LCD_SETUP_REG
LCD_CNTRL_REG
Gating Logic
HSYNC_TFT
t1
t2
t3
Rev. 1 — 17 March 2006
DE_TFT
VALID
Figure 1
presents the LCD controller block diagram.
State
Machine
TFTVDDON
t4
t5
TFTBKLTON
t6
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Chapter 10: LCD Controller
PNX17xx Series
26-bit counter
DATA_TFT
Figure 2
pictures
10-2