PNX1702EH/G,557 NXP Semiconductors, PNX1702EH/G,557 Datasheet - Page 389
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PNX1702EH/G,557
Manufacturer Part Number
PNX1702EH/G,557
Description
IC MEDIA PROC 500MHZ 456-BGA
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1702EHG557.pdf
(832 pages)
Specifications of PNX1702EH/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Ram Size
208K x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.33 V ~ 1.47 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-HBGA
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Lead Free Status / Rohs Status
Compliant
Other names
935281647557
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
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Philips Semiconductors
Volume 1 of 1
PNX17XX_SER_1
Preliminary data sheet
3.3.3 Data Flow Selection
The usage of address bit 12 would indicate a 8 kB aperture space for the QVCP. This
is however not the case, in the current implementation only bits 11:9 are used
because the QVCP occupies only a 4 kB address space. The 12’th bit is reserved for
future extensions and alignment purposes.
Pool resources are functional units which do not have a fixed assignment to a specific
layer. Depending on the use case a resource is assigned to a specific layer.
Two 32-bit registers, POOL_RESOURCE_ID and
POOL_RESOURCE_LAYER_ASSIGNMENT, are used to assign a specific resource
to a layer. One is used to identify the resource to be assigned. The other register is
split up into 4-bit chunks which contain the specific assignment for the resource
identified in the first register. This allows for up to 8 resources of the same kind per
functional unit. In this specific QVCP implementation, only two of the same kinds of
pool resources are needed. The remaining 6 slots are reserved for future
implementation. These two registers act in the same way as described earlier for the
aperture assignment. They are used to perform the assignment for all resources,
which is again stored in an internal table in which the two registers are the access
point. The ID register has to be programmed first.
The resource layer assignment for the 2-layer, 1-pool resource scenario is shown in
Figure
Table 11: Resource-Layer Assignment for Pool Resource
PR1
4’b000
4’b001
Figure 11: Resource Layer and ID
Figure 12: 2-Layer 1 Resource Elements Scenario
res.
12.
28
res.
24
res.
Rev. 1 — 17 March 2006
20
Pool Resource ID
res.
In1
In2
16
res.
Assignment
Resource is assigned to layer 1.
Resource is assigned to layer 2.
12
Pool
Mux
res.
PR1
8
res.
4
PR1
0
Pool Resource Assignment Register
Pool Resource ID Register (PRID)
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Out1
Out2
PNX17xx Series
Chapter 11: QVCP
11-32
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