PNX1702EH/G,557 NXP Semiconductors, PNX1702EH/G,557 Datasheet - Page 540
![no-image](/images/manufacturer_photos/0/4/487/nxp_semiconductors_sml.jpg)
PNX1702EH/G,557
Manufacturer Part Number
PNX1702EH/G,557
Description
IC MEDIA PROC 500MHZ 456-BGA
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1702EHG557.pdf
(832 pages)
Specifications of PNX1702EH/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Ram Size
208K x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.33 V ~ 1.47 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-HBGA
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Lead Free Status / Rohs Status
Compliant
Other names
935281647557
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
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Philips Semiconductors
Volume 1 of 1
Table 5: Operating Modes and Memory Formats
Table 6: Endian Ordering of Audio Data in Main Memory
PNX17XX_SER_1
Preliminary data sheet
NR_CHAN MODE
00
00
01
01
10
10
11
11
Operating
Modes
16-bit mono -
little endian
16-bit mono -
big endian
16-bit stereo
- little endian
Figure 6:
16 bit, stereo,
NR_CHAN=00
16 bit, stereo,
NR_CHAN=10
32 bit, mono,
NR_CHAN=00
32 bit, stereo,
NR_CHAN=10
32 bit, stereo,
NR_CHAN=00
Audio In Memory DMA Formats
mono (one channel)
stereo (one channel)
mono (two channels)
stereo (two channels)
mono (three channels)
stereo (three channels)
mono (four channels)
stereo (four channels)
m[adr]
left
left
left
n
n
n
[7:0]
[15:8]
[7:0]
SD0.left
SD0.left
SD0.left
3.5.1 Endian Control
3.5 Memory Data Formats
adr
adr
adr
SD0.left
n
n
SD0.left
n
m[adr+1]
left
left
left
adr
adr
The Audio In unit autonomously writes samples to memory in mono and stereo 16
and 32-bit per sample formats, as shown in
stored at increasing memory address locations.
The following table illustrates exactly how the Audio Inout block writes data in
memory (byte) locations precisely after the correct endian swapping done at the
adapter depending on the polarity of the big-endian bit in the Global Registers
Module.
n
n
n
SD0.right
SD0.right
SD0.right
[15:8]
[7:0]
[15:8]
adr+2
adr+2
n
n
adr+4
n
Source of Successive Samples
SD0.left
SD0.left, SD0.right
SD0.left, SD1.left
SD0.left, SD0.right, SD1.left, SD1.right
SD0.left, SD1.left, SD2.left
SD0.left, SD0.right, SD1.left, SD1.right, SD2.left, SD2.right
SD0.left, SD1.left, SD2.left, SD3.left
SD0.left, SD0.right, SD1.left, SD1.right, SD2.left, SD2.right, SD3.left, SD3.right.
n
n
m[adr+2]
left
left
]
right
n+1
n+1
SD0.left
SD1.left
SD1.left
n
adr+4
adr+4
[7:0]
[7:0]
[15:8
adr+8
SD0.left
SD0.right
Rev. 1 — 17 March 2006
n+1
adr+4
n
adr+4
n
m[adr+3]
left
]
left
right
SD0.right
n+1
n+1
SD1.right
n+1
SD1.right
n
adr+6
n
adr+6
[15:8] left
adr+12
[15:8
[7:0]
n+1
n
n
m[adr+4]
left
left
n+2
n+2
n+1
SD0.left
SD2.left
SD2.left
adr+8
adr+8
adr+16
[7:0]
[15:8]
[7:0]
SD0.left
SD0.left
n+2
adr+8
n
adr+8
n
Figure
m[adr+5]
left
left
left
SD0.right
n+2
n+1
SD2.right
SD2.right
adr+10
adr+10
n+2
n+2
n+1
adr+20
6. Successive samples are always
[15:8]
[7:0]
[15:8]
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
n+2
n
n
PNX17xx Series
SD0.left
m[adr+6]
left
left
right
SD0.left
Chapter 16: Audio Input
SD0.left
adr+12
adr+12
adr+24
n+3
n+3
SD0.left
n+1
SD0.right
[7:0]
[15:8]
adr+12
adr+12
n+1
n+3
[7:0]
n+1
SD0.right
SD0.right
n+2
SD0.right
n+1
adr+14
adr+14
adr+28
m[adr+7]
left
left
right
]
n+3
n+3
n+1
n+3
n+1
n+1
[15:8]
[7:0]
[15:8
16-10
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