PNX1702EH/G,557 NXP Semiconductors, PNX1702EH/G,557 Datasheet - Page 486

• Manufacturer Part Number: PNX1702EH/G,557
• Description: IC MEDIA PROC 500MHZ 456-BGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1702EH/G,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Ram Size: 208K x 8
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 61
• Voltage - Supply: 1.33 V ~ 1.47 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 456-HBGA
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 935281647557; PNX1702EH/G; PNX1702EH/G

Philips Semiconductors
Volume 1 of 1
Table 4: Status Registers
PNX17XX_SER_1
Preliminary data sheet
Bit
Standard Registers
Offset 0x07,1FE0
31:8
7
6
5
4
3
2
1
0
Offset 0x07,1FE4
31:6
5
4
3
2
1
0
Offset 0x07,1FE8
31:6
5
4
3
2
1
0
Offset 0x07,1FEC
31:6
5
4
Symbol
Reserved
BUF1_ACTIVE
Reserved
MBE
UNDERRUN
THRESH2_REACHED
THRESH1_REACHED
BUF2_DONE
BUF1_DONE
Reserved
MBE_ENA
UNDERRUN_ENA
THRESH2_REACHED_
ENA
THRESH1_REACHED_
ENA
BUF2_DONE_ENA
BUF1_DONE_ENA
Reserved
MBE_ACK
UNDERRUN_ACK
THRESH2_REACHED_
ACK
THRESH1_REACHED_
ACK
BUF2_DONE_ACK
BUF1_DONE_ACK
Reserved
MBE_SET
UNDERRUN_SET
FGPO_IR_STATUS
FGPO_IR_ENA
FGPO_IR_CLR
FGPO_IR_SET
Acces
s
R
R
R
R
R
R
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Rev. 1 — 17 March 2006
Description
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
1 when Buffer 1 is active
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
Memory Bandwidth Error detected.
Buffer Underrun detected.
Buffer 2 Threshold reached.
Buffer 1 Threshold reached.
Buffer 2 done.
Buffer 1 done.
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
Memory Bandwidth Error Interrupt Enable
Buffer Underrun Interrupt Enable
Buffer 2 Threshold Interrupt Enable
Buffer 2 Threshold Interrupt Enable
Buffer 2 done Interrupt Enable
Buffer 1 done Interrupt Enable
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
Memory Bandwidth Error Interrupt Acknowledge
Buffer Underrun Interrupt Acknowledge
Buffer 2 Threshold Interrupt Acknowledge
Buffer 2 Threshold Interrupt Acknowledge
Buffer 2 done Interrupt Acknowledge
Buffer 1 done Interrupt Acknowledge
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
Set Memory Bandwidth Error Interrupt
Set Buffer Underrun Interrupt
Chapter 13: FGPO: Fast General Purpose Output
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
13-21