PNX1702EH/G,557 NXP Semiconductors, PNX1702EH/G,557 Datasheet - Page 639

• Manufacturer Part Number: PNX1702EH/G,557
• Description: IC MEDIA PROC 500MHZ 456-BGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1702EH/G,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Ram Size: 208K x 8
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 61
• Voltage - Supply: 1.33 V ~ 1.47 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 456-HBGA
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 935281647557; PNX1702EH/G; PNX1702EH/G

Philips Semiconductors
Volume 1 of 1
Table 15: Source Stride
Table 16: Destination Stride
PNX17XX_SER_1
Preliminary data sheet
Bit
Offset 0x04 F414
31:14
13:0
Bit
Offset 0x04 F418
31:14
13:8
7:0
Symbol
Reserved
SrcStr
Symbol
Reserved
DstStr[13:8]
DstStr[7:0]
Source Stride
Destination Stride
This register is used to load the starting linear pixel address for a vector or the
destination linear address for a BLT operation.
It is interpreted as a byte address and must be loaded with a pixel aligned address.
Note that loading the DstXY register actually causes this register to be loaded with
the proper linear pixel address.
This register may not be used to specify the destination address for a command that
utilizes patterns.
This register holds the unsigned offset between adjacent source scanlines for screen-
to-screen BLTs. Under many circumstances, this register will be initialized to the
screen pitch and then changed only for special effects.
This 14-bit register is interpreted as an unsigned byte value. It is used during a BLT to
step from scanline to scanline. It is also used to convert a SrcXY address to a
SrcLinear address according to the following formula:
SrcLinear = SrcXY.Y * SrcStride + SrcXY.X
There are no restrictions on this register except that the lower three bits are always
interpreted as 0, regardless of the value written. When reading the contents of this
register, the lower three bits will be read back as 0. This implies the source stride
must be a multiple of 8 bytes.
direction in which a source is traversed is controlled by the BLT direction field in the
BltCtl register.
This register may be useful for BLTing bitmaps stored in off screen memory in a 1D
format to the screen. It is unchanged by any drawing operations.
As this is an unsigned register, it is always interpreted as a positive value. The
(1)
Acces
s
R/W
Acces
s
R/W
R/W
This value is adjusted for pixel color depth.
Value
0x3FF8
Value
0
0
Rev. 1 — 17 March 2006
Description
Used to load the starting linear pixel address for a vector or the
destination linear address for a BLT operation. Bits 2:0 must be set
to 0.
Description
Hold the offset between adjacent scanlines for BLTs and vectors.
Bits 2:0 must be set to 0.
(1)
+ SrcAddrBase
Chapter 20: 2D Drawing Engine
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
20-19