PNX1702EH/G,557 NXP Semiconductors, PNX1702EH/G,557 Datasheet - Page 491
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PNX1702EH/G,557
Manufacturer Part Number
PNX1702EH/G,557
Description
IC MEDIA PROC 500MHZ 456-BGA
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1702EHG557.pdf
(832 pages)
Specifications of PNX1702EH/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Ram Size
208K x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.33 V ~ 1.47 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-HBGA
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Lead Free Status / Rohs Status
Compliant
Other names
935281647557
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
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Philips Semiconductors
Volume 1 of 1
PNX17XX_SER_1
Preliminary data sheet
1.4.1 8-Bit Sample Packing Mode
1.4.2 16-bit Sample Packing Mode
1.4.3 32-bit Sample Mode
1.5 Record Capture Mode
1.6 Message Passing Mode
Sample data received on fgpi_data[7:0] will be packed into one 32-bit word as follows:
sample 1 to word[7:0]
sample 2 to word[15:8]
sample 3 to word[23:16]
sample 4 to word [31:24]
Sample data received on fgpi_data[15:0] will be packed into one 32-bit word as
follows:
sample 1 to word[15:0]
sample 2 to word[31:16]
Sample data received on fgpi_data[31:0] will pass to word[31:0].
This mode allows the FGPI to receive and store structured record data. The start of a
record may be triggered by a transition on the fgpi_start (fgpi_rec_start) pin. The
active transition is programmed in the FGPI_CTL register bits [3:2].
Recording starts at a new location in the current buffer for each record received.
Successive records are stored in the current buffer until the programmed number of
records a buffer contains is reached. At this time the next buffer is activated and
subsequent records are loaded into that buffer.
A buffer sync recording mode is available. This mode will switch between alternate
buffers on each active transition on the fgpi_stop (fgpi_buf_sync) pin. The active
transition is programmed in the FGPI_CTL register bits [7:5]. This allows recording of
video frames consisting of multiple line records synchronized by a frame sync of field
sync signal.
A continuous raw capture mode is available when FGPI_CTL register bits [7:5] ==
100 and bits [4:3] = 10. In this mode data is captured when ever fgpi_d_valid is
asserted high.
In message passing mode the FGPI can act as a receiver of data from the FGPO
output from another PNX17xx Series processor. The FGPI can also receive data from
a PNX1300 Series VO output in message passing mode.
Rev. 1 — 17 March 2006
Chapter 14: FGPI: Fast General Purpose Interface
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
14-4
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