PNX1702EH/G,557 NXP Semiconductors, PNX1702EH/G,557 Datasheet - Page 95

• Manufacturer Part Number: PNX1702EH/G,557
• Description: IC MEDIA PROC 500MHZ 456-BGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1702EH/G,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Ram Size: 208K x 8
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 61
• Voltage - Supply: 1.33 V ~ 1.47 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 456-HBGA
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 935281647557; PNX1702EH/G; PNX1702EH/G

Philips Semiconductors
Volume 1 of 1
PNX17XX_SER_1
Preliminary data sheet
7.3 Memory Based Scaler
VIP shares its allocated pins with the FGPI module through an input router.
shows the different operating modes of VIP and FGPI modules.
The PNX17xx Series contains a Memory Based Scaler that performs operations on
images in main memory. The scaler hardware can either be controlled task by task by
the TM5250, or it can be given a list of scaling tasks. The performance of the scaler
on large images is typically limited either by the 144 Mpixel/s (1 MHz of operating
frequency equals to 1 Mpixel/s) internal processing rate or by the allocated main
memory bandwidth.
The PNX17xx Series MBS can perform:
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Acquires VBI data using a separate acquisition window from the video acquisition
window.
Performs horizontal scaling, cropping and pixel packing on video data from a
continuous video data stream or from a single field or frame.
ANC header decoding or window mode for VBI data extraction.
Horizontal up scaling up to 2x.
Interrupt generation for VBI or video written to memory.
SD pixel frequency up to 81 MHz input clock (SD using up to 10-bit YUV CCIR-
656).
HD pixel frequency up to 81 MHz input clock (HD using 20-bit YUV input mode).
color space conversion (mutually exclusive with scaling).
raw data capture up to 81 MHz in either 8- or 10-bit, packed mode with double
buffering.
de-interlacing using either a median, 2-field majority select, or 3-field majority
select algorithm with an edge detect/correct post-pass (these three provide
increasing quality, at the expense of increased bandwidth requirements)
edge detect/correct on an input frame that has been software de-interlaced (this
provides future capabilities in case we develop a better core de-interlacer than 3-
field majority select)
horizontal & vertical scaling (on the input image, or on the result of edge detect/
correct stage)
linear and non-linear aspect ratio conversion
anti flicker filtering
conversions from any input pixel format to any non-indexed pixel format, including
conversions between 4:2:0, 4:2:2 and 4:4:4, indexed to true color conversion,
color expansion / compression, de-planarization/planarization (to convert
between planar and packed pixel formats, programmable color space conversion)
Rev. 1 — 17 March 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
Chapter 2: Overview
Section 9.
2-14