PNX1702EH/G,557 NXP Semiconductors, PNX1702EH/G,557 Datasheet - Page 459
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PNX1702EH/G,557
Manufacturer Part Number
PNX1702EH/G,557
Description
IC MEDIA PROC 500MHZ 456-BGA
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1702EHG557.pdf
(832 pages)
Specifications of PNX1702EH/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Ram Size
208K x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.33 V ~ 1.47 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-HBGA
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Lead Free Status / Rohs Status
Compliant
Other names
935281647557
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
PNX1702EH/G
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Philips Semiconductors
Volume 1 of 1
Table 10: Video Input Processor (VIP) 1 Registers
PNX17XX_SER_1
Preliminary data sheet
19
18
17:10
9
8
7:0
Offset 0x10 6230
31:30
29:20
19:10
9:0
Color Keying Control Registers
Offset 0x10 6284
31: 24 CKEY_ALPHA
23: 0
Video Output Format Control Registers
Offset 0x10 6300
31:30
29:14
13
12
Bit
Symbol
Unused
CSM_D1_TWOS
CSM_D1[7:0]
Unused
CSM_D0_TWOS
CSM_D0[7:0]
Unused
CSM_E2[9:0]
CSM_E1[9:0]
CSM_E0[9:0]
reserved
PSU_BAMODE
reserved
PSU_ENDIAN
reserved
Color space matrix offset coefficients E
Color Key Components
Video Output Format
Acces
s
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
-
0
0
-
0
0
-
0
0
0
0
0
-
0
-
Value
Rev. 1 — 17 March 2006
…Continued
Description
Offset coefficient D
0 = unsigned
1 = signed
Offset coefficient D
Offset coefficient D
0 = unsigned
1 = signed
Offset coefficient D
Offset coefficient E2, two’s complement
Offset coefficient E1, two’s complement
Offset coefficient E0, two’s complement
Alpha value
Defines the alpha value to be used for keyed samples.
Base address mode
00 = single set (e.g. progressive video source)
base 1-3 according to number of planes (plane 1-3)
01 = reserved
10 = alternate sets each field (e.g. interlaced video source)
base 1-3, odd field (plane 1-3)
base 4-6, even field (plane 1-3)
11 = alternate sets each field and frame (e.g. double buffer mode)
packed modes only, frame index is set to 1 if cfen=0, frame index is
incremented after capturing even field before capturing odd, base
address byte offset is defined in PSU_OFFSET1
base 1, odd field 1st frame (plane 1 only)
base 2, even field 1st frame (plane 1 only)
base 3, odd field 2nd frame (plane 1 only)
base 4, even field 2nd frame (plane 1 only)
Output format endianess
0: same as system endianess
1: opposite of system endianess
0
- E
2
1
1
0
0
type
type
Chapter 12: Video Input Processor
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
12-28
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