SAM3U2C Atmel Corporation, SAM3U2C Datasheet - Page 1047

• Manufacturer Part Number: SAM3U2C
• Manufacturer: Atmel Corporation

Specifications of SAM3U2C

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 96 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 28
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 57
• Ext Interrupts: 57
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 4
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 36
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

40.5.7
Name:
Address:
Access:
Reset:
• BTC[3:0]
Buffer transfer completed Disable Interrupt Register. When set, a bit of the BTC field disables the interrupt from the rele-
vant DMAC channel.
• CBTC[3:0]
Chained Buffer transfer completed Disable Register. When set, a bit of the CBTC field disables the interrupt from the rele-
vant DMAC channel.
• ERR[3:0]
Access Error Interrupt Disable Register. When set, a bit of the ERR field disables the interrupt from the relevant DMAC
channel.
6430E–ATARM–29-Aug-11
31
23
15
–
–
–
7
–
DMAC Error, Buffer Transfer and Chained Buffer Transfer Interrupt Disable Register
DMAC_EBCIDR
0x400B001C
0x00000000
Write-only
30
22
14
–
–
–
6
–
29
21
13
–
–
–
5
–
28
20
12
–
–
–
4
–
CBTC3
ERR3
BTC3
27
19
11
–
3
CBTC2
ERR2
BTC2
26
18
10
–
2
SAM3U Series
CBTC1
ERR1
BTC1
25
17
–
9
1
CBTC0
ERR0
BTC0
24
16
–
8
0
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