SAM3U2C Atmel Corporation, SAM3U2C Datasheet - Page 597

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SAM3U2C

Manufacturer Part Number
SAM3U2C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3U2C

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
28
Hardware Qtouch Acquisition
No
Max I/o Pins
57
Ext Interrupts
57
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
4
Twi (i2c)
1
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
36
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Table 32-4.
Figure 32-3. SPI Transfer Format (NCPHA = 1, 8 bits per transfer)
6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11
SPCK cycle (for reference)
SPI Mode
(from master)
(from slave)
(CPOL = 0)
(CPOL = 1)
(to slave)
0
1
2
3
SPCK
SPCK
MOSI
MISO
NSS
SPI Bus Protocol Mode
* Not defined, but normally MSB of previous character received.
CPOL
same parameter pair values to communicate. If multiple slaves are used and fixed in different
configurations, the master must reconfigure itself each time it needs to communicate with a dif-
ferent slave.
Table 32-4
Figure 32-3
0
0
1
1
MSB
1
MSB
NCPHA
shows the four modes and corresponding parameter settings.
and
1
0
1
0
2
Figure 32-4
6
6
3
Shift SPCK Edge
5
5
show examples of data transfers.
Falling
Falling
Rising
Rising
4
4
4
5
3
3
Capture SPCK Edge
6
6
2
2
Falling
Falling
Rising
Rising
7
1
1
SAM3U Series
SAM3U Series
8
LSB
LSB
SPCK Inactive Level
High
High
Low
Low
*
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