SAM3U2C Atmel Corporation, SAM3U2C Datasheet - Page 269

• Manufacturer Part Number: SAM3U2C
• Manufacturer: Atmel Corporation

Specifications of SAM3U2C

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 96 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 28
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 57
• Ext Interrupts: 57
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 4
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 36
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

18.5
Table 18-1.
Note:
6430E–ATARM–29-Aug-11
0x30–0xE0
0xE8–0xF8
Offset
0x0C
0x1C
0x2C
0xFC
0x00
0x04
0x08
0x10
0x14
0x18
0x20
0x24
0x28
0xE4
if an offset is not listed in the table it must be considered as reserved.
Real Time Clock (RTC) User Interface
Register Mapping
Register
Control Register
Mode Register
Time Register
Calendar Register
Time Alarm Register
Calendar Alarm Register
Status Register
Status Clear Command Register
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
Valid Entry Register
Reserved Register
Write Protect Mode Register
Reserved Register
Reserved Register
RTC_CALALR
RTC_TIMALR
RTC_WPMR
RTC_SCCR
RTC_CALR
RTC_TIMR
RTC_VER
RTC_IMR
RTC_IDR
RTC_IER
RTC_CR
RTC_MR
RTC_SR
Name
–
–
–
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-only
Write-only
Write-only
Write-only
Read-only
Read-only
Access
–
–
–
SAM3U Series
0x01210720
0x01010000
0x00000000
Reset
0x0
0x0
0x0
0x0
0x0
0x0
0x0
–
–
–
–
–
–
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