SAM3U2C Atmel Corporation, SAM3U2C Datasheet - Page 1173

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SAM3U2C

Manufacturer Part Number
SAM3U2C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3U2C

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
28
Hardware Qtouch Acquisition
No
Max I/o Pins
57
Ext Interrupts
57
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
4
Twi (i2c)
1
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
36
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
1
2
3
4
5
6
7
6430E–ATARM–29-Aug-11
Features ..................................................................................................... 1
SAM3U Description .................................................................................. 2
SAM3U Block Diagram ............................................................................ 3
Signal Description .................................................................................... 5
Package and Pinout ................................................................................. 9
Power Considerations ........................................................................... 15
Input/Output Lines ................................................................................. 24
Processor and Architecture .................................................................. 26
1.1 Configuration Summary ...........................................................................................2
3.1 Design Considerations ............................................................................................8
4.1 SAM3U4/2/1E Package and Pinout .........................................................................9
4.2 SAM3U4/2/1C Package and Pinout ......................................................................12
5.1 Power Supplies ......................................................................................................15
5.2 Voltage Regulator ..................................................................................................15
5.3 Typical Powering Schematics ................................................................................15
5.4 Active Mode ...........................................................................................................19
5.5 Low Power Modes .................................................................................................19
5.6 Wake-up Sources ..................................................................................................22
5.7 Fast Start-Up .........................................................................................................23
6.1 General Purpose I/O Lines (GPIO) ........................................................................24
6.2 System I/O Lines ...................................................................................................24
6.3 Serial Wire JTAG Debug Port (SWJ-DP) ..............................................................24
6.4 Test Pin .................................................................................................................25
6.5 NRST Pin ...............................................................................................................25
6.6 NRSTB Pin ............................................................................................................25
6.7 ERASE Pin ............................................................................................................25
7.1 ARM Cortex-M3 Processor ....................................................................................26
7.2 APB/AHB Bridges ..................................................................................................26
7.3 Matrix Masters .......................................................................................................26
7.4 Matrix Slaves .........................................................................................................27
7.5 Master to Slave Access .........................................................................................27
7.6 DMA Controller ......................................................................................................28
7.7 Peripheral DMA Controller .....................................................................................28
7.8 Debug and Test Features ......................................................................................29
SAM3U Series
i

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