SAM3U2C Atmel Corporation, SAM3U2C Datasheet - Page 365

• Manufacturer Part Number: SAM3U2C
• Manufacturer: Atmel Corporation

Specifications of SAM3U2C

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 96 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 28
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 57
• Ext Interrupts: 57
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 4
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 36
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Figure 25-12. WRITE_MODE = 0. The write operation is controlled by NCS
25.10.5
Table 25-6.
6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11
Coded Value
setup [5:0]
pulse [6:0]
cycle [8:0]
Coding Timing Parameters
Coding and Range of Timing Parameters
NWR0, NWR1
NBS0, NBS1,
A0, A1
D[15:0]
Number of Bits
A [23:2]
NWE,
MCK
NCS
All timing parameters are defined for one chip select and are grouped together in one
SMC_REGISTER according to their type.
Table 25-6
• The SMC_SETUP register groups the definition of all setup parameters: NRD_SETUP,
• The SMC_PULSE register groups the definition of all pulse parameters: NRD_PULSE,
• The SMC_CYCLE register groups the definition of all cycle parameters: NRD_CYCLE,
NCS_RD_SETUP, NWE_SETUP, NCS_WR_SETUP
NCS_RD_PULSE, NWE_PULSE, NCS_WR_PULSE
NWE_CYCLE
6
7
9
shows how the timing parameters are coded and their permitted range.
256 x cycle[8:7] + cycle[6:0]
128 x setup[5] + setup[4:0]
256 x pulse[6] + pulse[5:0]
Effective Value
Coded Value
0 ≤ cycle ≤ 127
0 ≤ setup ≤ 31
0 ≤ pulse ≤ 63
Permitted Range
SAM3U Series
SAM3U Series
Effective Value
256.. (256+127)
512.. (512+127)
768..(768+127)
128..(128+31)
256..(256+63)
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