SAM3U2C Atmel Corporation, SAM3U2C Datasheet - Page 231

• Manufacturer Part Number: SAM3U2C
• Manufacturer: Atmel Corporation

Specifications of SAM3U2C

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 96 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 28
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 57
• Ext Interrupts: 57
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 4
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 36
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

14.3
14.4
14.4.1
6430E–ATARM–29-Aug-11
Debug and Test Pin Description
Functional Description
Test Pin
Figure 14-3. Application Test Environment Example
Table 14-1.
Note:
One dedicated pin, TST, is used to define the device operating mode. When this pin is at low
level during power-up, the device is in normal operating mode. When at high level, the device is
in test mode or FFPI mode. The TST pin integrates a permanent pull-down resistor of about
15 kΩ, so that it can be left unconnected for normal operation. Note that when setting the TST pin
Signal Name
NRST
TST
TCK/SWCLK
TDI
TDO/TRACESWO
TMS/SWDIO
JTAGSEL
1. TDO pin is set in input mode when the Cortex-M3 Core is not in debug mode. Thus an external
pull-up (100 kΩ) must be added to avoid current consumption due to floating input.
Debug and Test Signal List
SAM3-based Application Board In Test
Connector
JTAG
Probe
JTAG
Function
Microcontroller Reset
Test Select
Test Clock/Serial Wire Clock
Test Data In
Test Data Out/Trace Asynchronous
Data Out
Test Mode Select/Serial Wire
Input/Output
JTAG Selection
SAM3
Chip n
SWD/JTAG
Reset/Test
Test Adaptor
Chip 2
Chip 1
Tester
Input/Output
Output
Type
Input
Input
Input
Input
Input
SAM3U Series
(1)
Active Level
High
Low
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