SAM3U2C Atmel Corporation, SAM3U2C Datasheet - Page 545

• Manufacturer Part Number: SAM3U2C
• Manufacturer: Atmel Corporation

Specifications of SAM3U2C

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 96 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 28
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 57
• Ext Interrupts: 57
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 4
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 36
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

30.7.42
Name:
Address:
Access:
Reset:
For more information on Write Protection Registers, refer to
• WPEN: Write Protect Enable
0 = Disables the Write Protect if WPKEY corresponds to 0x50494F (“PIO” in ASCII).
1 = Enables the Write Protect if WPKEY corresponds to 0x50494F (“PIO” in ASCII).
Protects the registers:
• WPKEY: Write Protect KEY
Should be written at value 0x50494F (“PIO” in ASCII). Writing any other value in this field aborts the write operation of the
WPEN bit. Always reads as 0.
6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11
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“PIO Controller PIO Enable Register” on page 524
“PIO Controller PIO Disable Register” on page 524
“PIO Controller Output Enable Register” on page 525
“PIO Controller Output Disable Register” on page 526
“PIO Controller Input Filter Enable Register” on page 527
“PIO Controller Input Filter Disable Register” on page 527
“PIO Multi-driver Enable Register” on page 532
“PIO Multi-driver Disable Register” on page 533
“PIO Pull Up Disable Register” on page 534
“PIO Pull Up Enable Register” on page 534
“PIO Peripheral AB Select Register” on page 535
“PIO Output Write Enable Register” on page 538
“PIO Output Write Disable Register” on page 538
31
23
15
—
7
PIO Write Protect Mode Register
30
22
14
—
PIO_WPMR
0x400E0CE4 (PIOA), 0x400E0EE4 (PIOB), 0x400E10E4 (PIOC)
Read-write
See
6
Table 30-2
29
21
13
—
5
28
20
12
—
4
WPKEY
WPKEY
WPKEY
Section 30.6.1 ”Write Protection
27
19
11
—
3
26
18
10
—
2
Registers”.
SAM3U Series
SAM3U Series
25
17
—
9
1
WPEN
24
16
8
0
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