SAM3U2C Atmel Corporation, SAM3U2C Datasheet - Page 353

• Manufacturer Part Number: SAM3U2C
• Manufacturer: Atmel Corporation

Specifications of SAM3U2C

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 96 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 28
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 57
• Ext Interrupts: 57
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 4
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 36
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

25. Static Memory Controller (SMC)
25.1
25.2
6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11
Description
Embedded Characteristics
The External Bus Interface is designed to ensure the successful data transfer between several
external devices and the Cortex-M3 based device. The External Bus Interface of the SAM3U
consists of a Static Memory Controller (SMC).
This SMC is capable of handling several types of external memory and peripheral devices, such
as SRAM, PSRAM, PROM, EPROM, EEPROM, LCD Module, NOR Flash and NAND Flash.
The SMC generates the signals that control the access to external memory devices or peripheral
devices. It has 4 Chip Selects and a 24-bit address bus. The 16-bit data bus can be configured
to interface with 8- or 16-bit external devices. Separate read and write control signals allow for
direct memory and peripheral interfacing. Read and write signal waveforms are fully
parametrizable.
The SMC can manage wait requests from external devices to extend the current access. The
SMC is provided with an automatic slow clock mode. In slow clock mode, it switches from user-
programmed waveforms to slow-rate specific waveforms on read and write signals.
The SMC embeds a NAND Flash Controller (NFC). The NFC can handle automatic transfers,
sending the commands and address cycles to the NAND Flash and transferring the contents of
the page (for read and write) to the NFC SRAM. It minimizes the CPU overhead.
The SMC includes programmable hardware error correcting code with one bit error correction
capability and supports two bits error detection. In order to improve overall system performance
the DATA phase of the transfer can be DMA assisted.
The External Data Bus can be scrambled/unscrambled by means of user keys.
• 16-Mbyte Address Space per Chip Select
• 8- or 16-bit Data Bus
• Word, Halfword, Byte Transfers
• Byte Write or Byte Select Lines
• Programmable Setup, Pulse and Hold Time for Read Signals per Chip Select
• Programmable Setup, Pulse and Hold Time for Write Signals per Chip Select
• Programmable Data Float Time per Chip Select
• External Data Bus Scrambling/Unscrambling Function
• External Wait Request
• Automatic Switch to Slow Clock Mode
• NAND Flash Controller Supporting NAND Flash with Multiplexed Data/Address Buses
• Supports SLC NAND Flash Technology
• Hardware Configurable Number of Chip Selects from 1 to 4
• Programmable Timing on a per Chip Select Basis
• AHB Slave Interface
• Atmel APB Configuration Interface
• Programmable Flash Data Width 8 Bits or 16 Bits
SAM3U Series
SAM3U Series
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