SAM3U2C Atmel Corporation, SAM3U2C Datasheet - Page 876

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SAM3U2C

Manufacturer Part Number
SAM3U2C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3U2C

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
28
Hardware Qtouch Acquisition
No
Max I/o Pins
57
Ext Interrupts
57
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
4
Twi (i2c)
1
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
36
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
38.6.2
38.6.2.1
Figure 38-3. Functional View of the Channel Block Diagram
876
876
Peripheral Bus
Generator
from APB
Clock
from
SAM3U Series
SAM3U Series
PWM Channel
Channel Block Diagram
Selector
Clock
Each of the 4 channels is composed of six blocks:
• A clock selector which selects one of the clocks provided by the clock generator (described in
• A counter clocked by the output of the clock selector. This counter is incremented or
• A comparator used to compute the OCx output waveform according to the counter value and
• A dead-time generator providing two complementary outputs (DTOHx/DTOLx) which allows
• An output override block that can force the two complementary outputs to a programmed
• An asynchronous fault protection mechanism that has the highest priority to override the two
Section 38.6.1 on page
decremented according to the channel configuration and comparators matches. The size of
the counter is 16 bits.
the configuration. The counter value can be the one of the channel counter or the one of the
channel 0 counter according to SYNCx bit in the
page 913
to drive external power control switches safely.
value (OOOHx/OOOLx).
complementary outputs in case of fault detection (PWMHx/PWMLx).
Duty-Cycle
Channel x
Channel 0
Counter
Counter
Update
Period
(PWM_SCM).
MUX
Comparator
SYNCx
874).
OCx
Channel x
Dead-Time
Generator
DTOHx
DTOLx
“PWM Sync Channels Mode Register” on
Override
Output
OOOHx
OOOLx
Protection
Fault
6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11
PWMHx
PWMLx

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