SAM3U2C Atmel Corporation, SAM3U2C Datasheet - Page 1087

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SAM3U2C

Manufacturer Part Number
SAM3U2C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3U2C

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
28
Hardware Qtouch Acquisition
No
Max I/o Pins
57
Ext Interrupts
57
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
4
Twi (i2c)
1
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
36
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
42. Analog-to-Digital Converter (ADC)
42.1
42.2
Figure 42-1. Analog-to-Digital Converter Block Diagram
42.3
Table 42-1.
6430E–ATARM–29-Aug-11
Pin Name
AD0 - AD7
ADTRG
Description
Block Diagram
Signal Description
Analog Inputs
with I/O lines
Multiplexed
ADC Pin Description
VDDANA
ADVREF
ADTRG
The ADC is based on a Successive Approximation Register (SAR) 10-bit Analog-to-Digital Con-
verter (ADC). It also integrates an 8-to-1 analog multiplexer, making possible the analog-to-
digital conversions of 8 analog lines. The conversions extend from 0V to ADVREF. The ADC
supports an 8-bit or 10-bit resolution mode, and conversion results are reported in a common
register for all channels, as well as in a channel-dedicated register. Software trigger, external
trigger on rising edge of the ADTRG pin or internal triggers from Timer Counter output(s) or
PWM Event lines are configurable.
The ADC also integrates a Sleep Mode and a conversion sequencer and connects with a PDC
channel. These features reduce both power consumption and processor intervention.
Finally, the user can configure ADC timings, such as Startup Time and Sample & Hold Time.
GND
AD0
AD1
ADn
PIO
Description
Analog input channels
External trigger
Selection
Channels
Trigger
Counter
Timer
Analog-to-Digital
Approximation
ADC cell
Successive
Converter
Register
ADC Controller
Interface
PMC
Control
Logic
User
MCK
ADC Interrupt
PDC
NVIC
SAM3U Series
System Bus
Peripheral Bridge
APB
1087

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