SAM3U2C Atmel Corporation, SAM3U2C Datasheet - Page 521

• Manufacturer Part Number: SAM3U2C
• Manufacturer: Atmel Corporation

Specifications of SAM3U2C

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 96 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 28
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 57
• Ext Interrupts: 57
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 4
• Twi (i2c): 1
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 36
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

30.6.1
6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11
Write Protection Registers
To prevent any single software error that may corrupt PIO behavior, certain address spaces can
be write-protected by setting the WPEN bit in the
(PIO_WPMR).
If a write access to the protected registers is detected, then the WPVS flag in the PIO Write Pro-
tect Status Register (PIO_WPSR) is set and the field WPVSRC indicates in which register the
write access has been attempted.
The WPVS flag is reset by writing the PIO Write Protect Mode Register (PIO_WPMR) with the
appropriate access key, WPKEY.
The protected registers are:
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“PIO Controller PIO Enable Register” on page 524
“PIO Controller PIO Disable Register” on page 524
“PIO Controller Output Enable Register” on page 525
“PIO Controller Output Disable Register” on page 526
“PIO Controller Input Filter Enable Register” on page 527
“PIO Controller Input Filter Disable Register” on page 527
“PIO Multi-driver Enable Register” on page 532
“PIO Multi-driver Disable Register” on page 533
“PIO Pull Up Disable Register” on page 534
“PIO Pull Up Enable Register” on page 534
“PIO Peripheral AB Select Register” on page 535
“PIO Output Write Enable Register” on page 538
“PIO Output Write Disable Register” on page 538
“PIO Write Protect Mode Register”
SAM3U Series
SAM3U Series
521
521