SAM3U2C Atmel Corporation, SAM3U2C Datasheet - Page 211

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SAM3U2C

Manufacturer Part Number
SAM3U2C
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3U2C

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
28
Hardware Qtouch Acquisition
No
Max I/o Pins
57
Ext Interrupts
57
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
4
Twi (i2c)
1
Uart
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
36
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Table 13-35. MPU registers summary
6430E–ATARM–29-Aug-11
Address
0xE000ED90
0xE000ED94
0xE000ED98
0xE000ED9C
0xE000EDA0
0xE000EDA4
0xE000EDA8
0xE000EDAC
0xE000EDB0
0xE000EDB4
0xE000EDB8
Name
TYPE
CTRL
RNR
RBAR
RASR
RBAR_A1
RASR_A1
RBAR_A2
RASR_A2
RBAR_A3
RASR_A3
Table 13-34. Memory attributes summary (Continued)
Use the MPU registers to define the MPU regions and their attributes. The MPU registers are:
Memory
type
Normal
Type
RO
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Shareability
Non-shared
Shared
Non-shared
Required
privilege
Privileged
Privileged
Privileged
Privileged
Privileged
Privileged
Privileged
Privileged
Privileged
Privileged
Privileged
Other attributes
-
Reset
value
0x00000800
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
Description
“MPU Type Register” on page 212
“MPU Control Register” on page 213
“MPU Region Number Register” on page 215
“MPU Region Base Address Register” on page 216
“MPU Region Attribute and Size Register” on page 217
Alias of RBAR, see
Register” on page 216
Alias of RASR, see
Register” on page 217
Alias of RBAR, see
Register” on page 216
Alias of RASR, see
Register” on page 217
Alias of RBAR, see
Register” on page 216
Alias of RASR, see
Register” on page 217
Description
Memory-mapped peripherals that only a single
processor uses.
Normal memory that is shared between several
processors.
Normal memory that only a single processor
uses.
“MPU Region Base Address
“MPU Region Attribute and Size
“MPU Region Base Address
“MPU Region Attribute and Size
“MPU Region Base Address
“MPU Region Attribute and Size
SAM3U Series
211

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