ATAVRDISPLAYX Atmel, ATAVRDISPLAYX Datasheet - Page 115

• Manufacturer Part Number: ATAVRDISPLAYX
• Description: KIT EVAL XMEGA DISPLAY
• Manufacturer: Atmel

Specifications of ATAVRDISPLAYX

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Silicon Manufacturer: Atmel
• Silicon Family Name: ATxmega
• Kit Contents: Board
• Features: Temperature Sensor, Mono Speaker Via Audio Amplifier
• Svhc: No SVHC (15-Dec-2010)
• Core Architecture: AVR
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.6.2
10.6.3
8077H–AVR–12/09
STATUS: Battery Backup Status Register
BACKUP0: Battery Backup Register 0
These bits are protected by the Configuration Change Protection mechanism, for detailed
description refer to
• Bit 7 - BBPWR: Battery Backup Power
The Power on the V
BBPWR flag will be set to one when no V
writing a one to its bit location.
• Bit [6:4] - Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 3- XOSCRDY: Crystal Oscillator Ready
When the 32 kHz crystal oscillator is stable and ready to be used, this flag is set. This flag can
be cleared by writing a one to its bit location.
• Bit 2 - XOSCFAIL: Crystal Oscillator Failure
If the 32 kHz crystal oscillator has had an failure, the flag will be read as one. This flag can be
cleared by applying a RESET to the battery backup module.
• Bit 1 - BBBODF: Battery Backup Brown-Out Detection Flag
This flag is read one if a Battery Backup BOD is detected when the Battery Backup Module is
powered from the V
is not valid when BBPWR is set.
• Bit 0 - BBPODF: Battery Backup Power-On Detection Flag
This flag is set if a Battery Backup Power-On is detected, i.e when power is connected to V
This flag can be cleared by writing a one to its bit location. This flag is not valid when BBPWR is
set.
Bit
+0x01
Read/Write
Reset Value
Bit
+0x02
Read/Write
Reset Value
BBPWR
R/W
R/W
7
x
7
0
”Configuration Change Protection” on page
BAT
BAT
R/W
pin is automatically checked each time the main domain is powered. The
pin. This flag can be cleared by writing a one to its bit location. This flag
6
6
-
R
0
x
5
-
R
0
R/W
5
x
4
-
R
0
R/W
BACKUP0[7:0]
4
x
XOSCRDY
BAT
R/W
3
x
pin power is detected. The flag can be cleared by
R/W
3
x
XOSCFAIL
R/W
2
x
R/W
2
x
12.
BBBODF
R/W
1
R/W
0
1
x
BBPODF
R/W
0
R/W
x
0
0
XMEGA A
BACKUP0
STATUS
115
BAT
.