ATAVRDISPLAYX Atmel, ATAVRDISPLAYX Datasheet - Page 308

• Manufacturer Part Number: ATAVRDISPLAYX
• Description: KIT EVAL XMEGA DISPLAY
• Manufacturer: Atmel

Specifications of ATAVRDISPLAYX

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Silicon Manufacturer: Atmel
• Silicon Family Name: ATxmega
• Kit Contents: Board
• Features: Temperature Sensor, Mono Speaker Via Audio Amplifier
• Svhc: No SVHC (15-Dec-2010)
• Core Architecture: AVR
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

25.16.10.1
25.16.10.2
25.16.10.3
25.16.11 CHnRESL - ADC Channel n Result register Low
25.16.11.1
25.16.11.2
25.16.12 CMPH - ADC Compare register High
8077H–AVR–12/09
12-bit mode, left adjusted
12-bit mode, right adjusted
8-bit mode
12-/8-bit mode
12-bit mode, left adjusted
• Bits 7:0 - CHRES[11:4]: ADC Channel Result, high byte
These are the 8 MSB of the 12-bit ADC result.
• Bits 7:4 - Reserved
These bits will in practice be the extension of the sign bit CHRES11 when ADC works in differen-
tial mode and set to zero when ADC works in signed mode.
• Bits 3:0 - CHRES[11:8]: ADC Channel Result, high byte
These are the 4 MSB of the 12-bit ADC result.
• Bits 7:0 - Reserved
These bits will in practice be the extension of the sign bit CHRES7 when ADC works in signed
mode and set to zero when ADC works in single-ended mode.
• Bits 7:0 - CHRES[7:0]: ADC Channel Result, low byte
These are the 8 LSB of the ADC result.
• Bits 7:4 - CHRES[3:0]: ADC Channel Result, low byte
These are the 4 LSB of the 12 bit ADC result.
• Bits 3:0 - Reserved
These bits are reserved and will always read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
The CMPH and CMPL register pair represents the 16-bit value ADC Compare (CMP). For
details on reading and writing 16-bit registers refer to
on page
12-/8-
12-bit, left
12.
Bit
Read/Write
Initial Value
R
7
0
R
6
0
CHRES[3:0]
R
5
0
Section 3.11 ”Accessing 16-bits Registers”
R
4
0
CHRES[7:0]
R
3
0
-
R
2
0
-
XMEGA A
R
1
0
-
R
0
0
-
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