ATAVRDISPLAYX Atmel, ATAVRDISPLAYX Datasheet - Page 32

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ATAVRDISPLAYX

Manufacturer Part Number
ATAVRDISPLAYX
Description
KIT EVAL XMEGA DISPLAY
Manufacturer
Atmel
Datasheets

Specifications of ATAVRDISPLAYX

Main Purpose
*
Embedded
*
Utilized Ic / Part
*
Primary Attributes
*
Secondary Attributes
*
Silicon Manufacturer
Atmel
Silicon Family Name
ATxmega
Kit Contents
Board
Features
Temperature Sensor, Mono Speaker Via Audio Amplifier
Svhc
No SVHC (15-Dec-2010)
Core Architecture
AVR
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATAVRDISPLAYX
Manufacturer:
Atmel
Quantity:
135
4.16.5
8077H–AVR–12/09
FUSEBYTE5 - Non-Volatile Memory Fuse Byte 5
Table 4-3.
• Bit 1 - WDLOCK: Watchdog Timer lock
The WDLOCK fuse can be programmed to lock the Watchdog Timer configuration. When this
fuse is programmed the Watchdog Timer configuration cannot be changed, and the Watchdog
Timer cannot be disabled from the application software. When this fuse is programmed the
ENABLE bit in the watchdog CTRL register is automatically set at reset. The WEN bit in the
watchdog WINCTRL register is not set automatically and needs to be enabled from software.
Table 4-4.
• Bit 0 - JTAGEN: JTAG enabled
The JTAGEN fuse decides whether or not the JTAG interface is enabled.
When the JTAG interface is disabled all access through JTAG is prohibited, and the device can
only be accessed using the Program and Debug Interface (PDI).
Table 4-5.
The JTAGEN fuse is only available on devices with JTAG interface.
• Bit 7:6 - Reserved
These bits are reserved. For compatibility with future devices, always write these bits to one
when this register is written.
Bit
+0x05
Read/Write
Initial Value
STARTUPTIME[1:0]
WDLOCK
JTAGEN
00
01
10
11
0
1
0
1
Start-up Time
Watchdog Timer locking
JTAG Enable
R/W
7
1
-
Description
Watchdog Timer locked for modifications
Watchdog Timer not locked
Description
JTAG enabled
JTAG disabled
R/W
6
1
-
R
5
BODACT[1:0]
-
4
R
-
1kHz ULP oscillator Cycles
EESAVE
R/W
3
-
Reserved
64
4
0
R/W
2
-
BODLEVEL[2:0]
R/W
1
-
XMEGA A
R/W
0
-
FUSEBYTE5
32

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