ATAVRDISPLAYX Atmel, ATAVRDISPLAYX Datasheet - Page 359

• Manufacturer Part Number: ATAVRDISPLAYX
• Description: KIT EVAL XMEGA DISPLAY
• Manufacturer: Atmel

Specifications of ATAVRDISPLAYX

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Silicon Manufacturer: Atmel
• Silicon Family Name: ATxmega
• Kit Contents: Board
• Features: Temperature Sensor, Mono Speaker Via Audio Amplifier
• Svhc: No SVHC (15-Dec-2010)
• Core Architecture: AVR
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

29.7
29.7.1
29.7.2
29.7.3
8077H–AVR–12/09
Register Description - PDI Control and Status Register
STATUS - Program and Debug Interface Status Register
RESET - Program and Debug Interface Reset register
CTRL - Program and Debug Interface Control Register
These register are registers that are accessible in the PDI Control and Status Register Space
(CSRS) using the instructions LDCS and STCS. The CSRS is allocated for registers directly
involved in configuration and status monitoring of the PDI itself.
• Bit 7:2 - Reserved Bits
These bits are reserved and will always be read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
• Bit 1- NVMEN: Non-Volatile Memory Enable
This status bit is set when the key signalling enables the NVM programming interface. The
External Programmer can poll this bit to verify successful enabling. Writing the NVMEN bit dis-
ables the NVM interface
• Bit 0 - Reserved Bit
This bit is reserved and will always be read as zero. For compatibility with future devices, always
write this bit to zero when this register is written.
• Bit 7:0 - RESET[7:0]: Reset Signature
When the Reset Signature - 0x59 - is written to RESET, the device is forced into reset. The
device is kept in reset until RESET is written with a data value different from the Reset Signature
(0x00 is recommended). Reading the least LSB bit the will return the status of the RESET. The 7
MSB bits will always return the value 0x00 regardless of whether the device is in reset or not.
• Bit 7:3 - Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
Bit
+0x01
Read/Write
Initial Value
Bit
+0x00
Read/Write
Initial Value
Bit
+0x02
Read/Write
Initial Value
R/W
R
R
7
0
7
0
7
0
-
-
R/W
R
R
6
0
6
0
6
0
-
-
R/W
R
R
5
0
5
0
5
0
-
-
R/W
R
R
4
0
4
0
4
0
-
-
RESET[7:0]
R/W
R
R
3
0
3
0
3
0
-
-
R/W
R/W
R
2
0
2
0
2
0
-
GUARDTIME[2:0]
NVMEN
R/W
R/W
R
1
0
1
0
1
0
XMEGA A
R/W
R/W
R
0
0
0
0
0
0
-
STATUS
CTRLB
CTRL
359