ATAVRDISPLAYX Atmel, ATAVRDISPLAYX Datasheet - Page 138

• Manufacturer Part Number: ATAVRDISPLAYX
• Description: KIT EVAL XMEGA DISPLAY
• Manufacturer: Atmel

Specifications of ATAVRDISPLAYX

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Silicon Manufacturer: Atmel
• Silicon Family Name: ATxmega
• Kit Contents: Board
• Features: Temperature Sensor, Mono Speaker Via Audio Amplifier
• Svhc: No SVHC (15-Dec-2010)
• Core Architecture: AVR
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.12 Multi-configuration
13.13 Virtual Port Registers
13.14 Register Description – Ports
13.14.1
13.14.2
8077H–AVR–12/09
DIR - Data Direction Register
DIRSET - Data Direction Set Register
be visible on the port pin as long as the event last. Normally this is one peripheral clock cycle
only.
MPCMASK can be used to set a bit mask for the pin configuration registers. When setting bit n in
MPCMASK, PINnCTRL is added to the pin configuration mask. During the next write to any of
the port's pin configuration registers, the same value will be written to all the port's pin configura-
tion registers set by the mask. The MPCMASK register is cleared automatically after the write
operation to the pin configuration registers is finished.
Virtual port registers allow for port registers in the extended I/O memory space to be mapped vir-
tually in the I/O memory space. When mapping a port, writing to the virtual port register will be
the same as writing to the real port register. This enables use of I/O memory specific instructions
for bit-manipulation, and the I/O memory specific instructions IN and OUT on port register that
normally resides in the extended I/O memory space. There are four virtual ports, so up to four
ports can be mapped virtually at the same time. The mapped registers are IN, OUT, DIR and
INTFLAGS.
• Bit 7:0 - DIR[7:0]: Data Direction
This register sets the data direction for the individual pins in the port. If DIRn is written to one, pin
n is configured as an output pin. If DIRn is written to zero, pin n is configured as an input pin.
• Bit 7:0 - DIRSET[7:0]: Port Data Direction Set
This register can be used instead of a Read-Modify-Write to set individual pins as output. Writing
a one to a bit will set the corresponding bit in the DIR register. Reading this register will return
the value of the DIR register.
Bit
+0x01
Read/Write
Initial Value
Bit
+0x00
Read/Write
Initial Value
R/W
R/W
7
0
7
0
R/W
R/W
6
0
6
0
R/W
R/W
5
0
5
0
R/W
R/W
4
0
4
0
DIRSET[7:0]
DIR[7:0]
R/W
R/W
3
0
3
0
R/W
R/W
2
0
2
0
R/W
R/W
1
0
1
0
XMEGA A
R/W
R/W
0
0
0
0
DIRSET
DIR
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