ATAVRDISPLAYX Atmel, ATAVRDISPLAYX Datasheet - Page 7

• Manufacturer Part Number: ATAVRDISPLAYX
• Description: KIT EVAL XMEGA DISPLAY
• Manufacturer: Atmel

Specifications of ATAVRDISPLAYX

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Silicon Manufacturer: Atmel
• Silicon Family Name: ATxmega
• Kit Contents: Board
• Features: Temperature Sensor, Mono Speaker Via Audio Amplifier
• Svhc: No SVHC (15-Dec-2010)
• Core Architecture: AVR
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.4
3.4.1
3.5
8077H–AVR–12/09
ALU - Arithmetic Logic Unit
Program Flow
Hardware Multiplier
The SRAM holds data, and code cannot be executed from here. It can easily be accessed
through the five different addressing modes supported in the AVR architecture. The first SRAM
address is 0x2000.
Data address 0x1000 to 0x1FFF is reserved for memory mapping of EEPROM.
The Program Memory is divided in two sections, the Application Program section and the Boot
Program section. Both sections have dedicated Lock bits for write and read/write protection. The
SPM instruction that is used for self-programming of the Application Flash memory must reside
in the Boot Program section. A third section exists inside the Application section. This section,
the Application Table section, has separate Lock bits for write and read/write protection. The
Application Table section can be used for storing non-volatile data or application software.
The Arithmetic Logic Unit (ALU) supports arithmetic and logic operations between registers or
between a constant and a register. Single register operations can also be executed. The ALU
operates in direct connection with all the 32 general purpose registers. In a typical single cycle
ALU operation, two operands are output from the Register File, the operation is executed, and
the result is stored back in the Register File.
In order to operate on data in the Data Memory, these must first be loaded into the Register File.
After the operation, the data can be stored from the Register File and back to the Data Memory.
The ALU operations are divided into three main categories - arithmetic, logical, and bit-functions.
After an arithmetic or logic operation, the Status Register is updated to reflect information about
the result of the operation.
The multiplier is capable of multiplying two 8-bit numbers into a 16-bit result. The hardware mul-
tiplier supports different variations of signed and unsigned integer and fractional numbers:
A multiplication takes two CPU clock cycles.
After reset, the program will start to execute from program address 0. Program flow is provided
by conditional and unconditional jump and call instructions, able to directly address the whole
address space. Most instructions have a single 16-bit word format. Every program memory
address contains a 16- or 32-bit instruction. The Program Counter (PC) addresses the location
from where instructions are fetched. During interrupts and subroutine calls, the return address
PC is stored on the Stack.
• Multiplication of unsigned integers.
• Multiplication of signed integers.
• Multiplication of a signed integer with an unsigned integer.
• Multiplication of unsigned fractional numbers.
• Multiplication of signed fractional numbers.
• Multiplication of a signed fractional number and with an unsigned.
XMEGA A
7