ATAVRDISPLAYX Atmel, ATAVRDISPLAYX Datasheet - Page 309

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ATAVRDISPLAYX

Manufacturer Part Number
ATAVRDISPLAYX
Description
KIT EVAL XMEGA DISPLAY
Manufacturer
Atmel
Datasheets

Specifications of ATAVRDISPLAYX

Main Purpose
*
Embedded
*
Utilized Ic / Part
*
Primary Attributes
*
Secondary Attributes
*
Silicon Manufacturer
Atmel
Silicon Family Name
ATxmega
Kit Contents
Board
Features
Temperature Sensor, Mono Speaker Via Audio Amplifier
Svhc
No SVHC (15-Dec-2010)
Core Architecture
AVR
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATAVRDISPLAYX
Manufacturer:
Atmel
Quantity:
135
25.16.13 CMPL - ADC Compare register Low
25.17 Register Description - ADC Channel
25.17.1
8077H–AVR–12/09
CTRL - ADC Channel Control Register
• Bits 7:0 - CMP[15:0]: ADC Compare value high byte
These are the 8 MSB of the 16-bit ADC compare value. In signed mode, the number representa-
tion is 2's complement and the MSB is the sign bit.
• Bits 7:0 - CMP[7:0]: ADC compare value high byte
These are the 8 LSB of the 16-bit ADC compare value. In signed mode, the number representa-
tion is 2's complement.
• Bit 7 - START: START Conversion on Channel
Writing this to one will start a conversion on the channel. The bit is cleared by hardware when
the conversion has started. Setting this bit when it already is set will have no effect. Writing or
reading these bits is equivalent to writing the CH[3:0]START bits in
ister A” on page
• Bits 6:5 - Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bits 4:3 - GAIN[2:0]: ADC Gain Factor
These bits define the gain factor in order to amplify input signals before ADC conversion.
Bit
+0x18
Read/Write
Initial Value
Bit
+0x19
Read/Write
Initial Value
Bit
+0x00
Read/Write
Initial Value
START
R/W
7
0
R/W
R/W
7
0
7
0
302.
R
R/W
6
0
R/W
-
6
0
6
0
R/W
R
R/W
5
0
-
5
0
5
0
R/W
R/W
R/W
4
0
4
0
4
0
CMP[15:0]
CMP[7:0]
GAIN[2:0}
R/W
R/W
R/W
3
0
3
0
3
0
R/W
R/W
R/W
2
0
2
0
2
0
”CTRLA - ADC Control Reg-
R/W
R/W
R/W
INPUTMODE[1:0]
1
0
1
0
1
0
XMEGA A
R/W
R/W
R/W
0
0
0
0
0
0
CMPH
CMPL
CTRL
309

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