ATAVRDISPLAYX Atmel, ATAVRDISPLAYX Datasheet - Page 355

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ATAVRDISPLAYX

Manufacturer Part Number
ATAVRDISPLAYX
Description
KIT EVAL XMEGA DISPLAY
Manufacturer
Atmel
Datasheets

Specifications of ATAVRDISPLAYX

Main Purpose
*
Embedded
*
Utilized Ic / Part
*
Primary Attributes
*
Secondary Attributes
*
Silicon Manufacturer
Atmel
Silicon Family Name
ATxmega
Kit Contents
Board
Features
Temperature Sensor, Mono Speaker Via Audio Amplifier
Svhc
No SVHC (15-Dec-2010)
Core Architecture
AVR
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATAVRDISPLAYX
Manufacturer:
Atmel
Quantity:
135
29.5.6.2
29.5.6.3
29.5.6.4
29.5.6.5
29.5.6.6
8077H–AVR–12/09
STS - Store data to PDIBUS Data Space using direct addressing
LD - Load data from PDIBUS Data Space using indirect addressing
ST - Store data to PDIBUS Data Space using indirect addressing
LDCS - Load data from PDI Control and Status Register Space
STCS - Store data to PDI Control and Status Register Space
address/data sizes are supported; byte, word, 3 bytes, and long (4 bytes). It should be noted that
multiple-bytes access is internally broken down to repeated single-byte accesses. The main
advantage with the multiple-bytes access is that it gives a way to reduce the protocol overhead.
When using the LDS, the address byte(s) must be transmitted before the data transfer.
The ST instruction is used to store data that is serially shifted into the physical layer shift-register
to locations within the PDIBUS Data Space. The STS instruction is based on direct addressing,
which means that the address must be given as an argument to the instruction. Even though the
protocol is based on byte-wise communication, the ST instruction supports multiple-bytes
address - and data access. Four different address/data sizes are supported; byte, word, 3 bytes,
and long (4 bytes). It should be noted that multiple-bytes access is internally broken down to
repeated single-byte accesses. The main advantage with the multiple-bytes access is that it
gives a way to reduce the protocol overhead. When using the STS, the address byte(s) must be
transmitted before the data transfer.
The LD instruction is used to load data from the PDIBUS Data Space to the physical layer shift-
register for serial read-out. The LD instruction is based on indirect addressing (pointer access),
which means that the address must be stored into the Pointer register prior to the data access.
Indirect addressing can be combined with pointer increment. In addition to read data from the
PDIBUS Data Space, the Pointer register can be read by the LD instruction. Even though the
protocol is based on byte-wise communication, the LD instruction supports multiple-bytes
address - and data access. Four different address/data sizes are supported; byte, word, 3 bytes,
and long (4 bytes). It should be noted that multiple-bytes access is internally broken down to
repeated single-byte accesses. The main advantage with the multiple-bytes access is that it
gives a way to reduce the protocol overhead.
The ST instruction is used to store data that is serially shifted into the physical layer shift-register
to locations within the PDIBUS Data Space. The ST instruction is based on indirect addressing
(pointer access), which means that the address must be stored into the Pointer register prior to
the data access. Indirect addressing can be combined with pointer increment. In addition to write
data to the PDIBUS Data Space, the Pointer register can be written by the ST instruction. Even
though the protocol is based on byte-wise communication, the ST instruction supports multiple-
bytes address - and data access. Four different address/data sizes are supported; byte, word, 3
bytes, and long (4 bytes). It should be noted that multiple-bytes access is internally broken down
to repeated single-byte accesses. The main advantage with the multiple-bytes access is that it
gives a way to reduce the protocol overhead.
The LDCS instruction is used to load data from the PDI Control and Status Registers to the
physical layer shift-register for serial read-out. The LDCS instruction supports only direct
addressing and single-byte access.
The STCS instruction is used to store data that is serially shifted into the physical layer shift-reg-
ister to locations within the PDI Control and Status Registers. The STCS instruction supports
only direct addressing and single-byte access.
XMEGA A
355

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