ATAVRDISPLAYX Atmel, ATAVRDISPLAYX Datasheet - Page 31

• Manufacturer Part Number: ATAVRDISPLAYX
• Description: KIT EVAL XMEGA DISPLAY
• Manufacturer: Atmel

Specifications of ATAVRDISPLAYX

• Main Purpose: *
• Embedded: *
• Utilized Ic / Part: *
• Primary Attributes: *
• Secondary Attributes: *
• Silicon Manufacturer: Atmel
• Silicon Family Name: ATxmega
• Kit Contents: Board
• Features: Temperature Sensor, Mono Speaker Via Audio Amplifier
• Svhc: No SVHC (15-Dec-2010)
• Core Architecture: AVR
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.16.4
8077H–AVR–12/09
FUSEBYTE4 - Non-Volatile Memory fuse Byte4 - Start-up Configuration
• Bit 6 - BOOTRST: Boot Loader Section Reset Vector
The BOOTRST fuse can be programmed so the Reset Vector is pointing to the first address in
the Boot Loader Flash Section. In this case, the device will start executing from the from Boot
Loader Flash Section after reset.
Table 4-1.
• Bit 5:2 - Reserved
These fuse bits are reserved. For compatibility with future devices, always write these bits to one
when this register is written.
• Bit 1:0 - BODPD[1:0]: BOD operation in power-down mode
The BODPD fuse bits set the BOD operation mode in all sleep modes except Idle mode.
For details on the BOD and BOD operation modes refer to
Table 4-2.
• Bit 7:5 - Reserved
These fuse bits are reserved. For compatibility with future devices, always write these bits to one
when this register is written.
• Bit: 4 - RSTDISBL - External Reset Disable
This fuse can be programmed to disable the external reset pin functionality. When this is done
pulling this pin low will not cause an external reset.
• Bit 3:2 - STARTUPTIME[1:0]: Start-up time
The STARTUPTIME fuse bits can be used to set at a programmable timeout period from all
reset sources are released and until the internal reset is released from the delay counter.
The delay is timed from the 1kHz output of the ULP oscillator, refer to
Sequence” on page 104
Bit
+0x04
Read/Write
Initial Value
BODPD[1:0]
BOOTRST
0
1
00
01
10
11
R/W
Boot Reset Fuse
BOD operation modes in sleep modes
7
–
1
Reset Address
Reset Vector = Boot Loader Reset
Reset Vector = Application Reset (address 0x0000)
Description
Reserved
BOD enabled in sampled mode
BOD enabled continuously
BOD Disabled
R/W
6
–
1
for details.
R/W
5
–
1
RSTDISBL
R/W
4
1
STARTUPTIME[1:0]
R/W
3
1
R/W
2
1
”Brown-Out Detection” on page
WDLOCK
R/W
1
1
Section 9.3 ”Reset
JTAGEN
XMEGA A
R/W
0
0
FUSEBYTE4
106.
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